diff options
| author | Hans de Goede <j.w.r.degoede@hhs.nl> | 2007-10-20 18:55:35 -0400 |
|---|---|---|
| committer | Mark M. Hoffman <mhoffman@lightlink.com> | 2007-11-08 08:42:46 -0500 |
| commit | ff8966acb9d6bacdbb8971762bbd3ba6480f6077 (patch) | |
| tree | dd861e0406298d8bcc0456b979e60f46258ddc2f /drivers/hwmon | |
| parent | 2ecb044e8d53245b7e987b30126c54a27db3bf7e (diff) | |
hwmon: (abituguru3) Add support for 2 new motherboards
Signed-of-by: Hans de Goede <j.w.r.degoede@hhs.nl>
Acked-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
Diffstat (limited to 'drivers/hwmon')
| -rw-r--r-- | drivers/hwmon/abituguru3.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/drivers/hwmon/abituguru3.c b/drivers/hwmon/abituguru3.c index cb2331bfd9d5..e4b708d51f04 100644 --- a/drivers/hwmon/abituguru3.c +++ b/drivers/hwmon/abituguru3.c | |||
| @@ -530,6 +530,60 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = { | |||
| 530 | { "AUX3 Fan", 36, 2, 60, 1, 0 }, | 530 | { "AUX3 Fan", 36, 2, 60, 1, 0 }, |
| 531 | { NULL, 0, 0, 0, 0, 0 } } | 531 | { NULL, 0, 0, 0, 0, 0 } } |
| 532 | }, | 532 | }, |
| 533 | { 0x001B, "unknown", { | ||
| 534 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
| 535 | { "DDR3", 1, 0, 20, 1, 0 }, | ||
| 536 | { "DDR3 VTT", 2, 0, 10, 1, 0 }, | ||
| 537 | { "CPU VTT", 3, 0, 10, 1, 0 }, | ||
| 538 | { "MCH 1.25V", 4, 0, 10, 1, 0 }, | ||
| 539 | { "ICHIO 1.5V", 5, 0, 10, 1, 0 }, | ||
| 540 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
| 541 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
| 542 | { "ATX +12V (8-pin)", 8, 0, 60, 1, 0 }, | ||
| 543 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
| 544 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
| 545 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
| 546 | { "CPU", 24, 1, 1, 1, 0 }, | ||
| 547 | { "System", 25, 1, 1, 1, 0 }, | ||
| 548 | { "PWM Phase1", 26, 1, 1, 1, 0 }, | ||
| 549 | { "PWM Phase2", 27, 1, 1, 1, 0 }, | ||
| 550 | { "PWM Phase3", 28, 1, 1, 1, 0 }, | ||
| 551 | { "PWM Phase4", 29, 1, 1, 1, 0 }, | ||
| 552 | { "PWM Phase5", 30, 1, 1, 1, 0 }, | ||
| 553 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
| 554 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
| 555 | { "AUX1 Fan", 33, 2, 60, 1, 0 }, | ||
| 556 | { "AUX2 Fan", 35, 2, 60, 1, 0 }, | ||
| 557 | { "AUX3 Fan", 36, 2, 60, 1, 0 }, | ||
| 558 | { NULL, 0, 0, 0, 0, 0 } } | ||
| 559 | }, | ||
| 560 | { 0x001C, "unknown", { | ||
| 561 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
| 562 | { "DDR2", 1, 0, 20, 1, 0 }, | ||
| 563 | { "DDR2 VTT", 2, 0, 10, 1, 0 }, | ||
| 564 | { "CPU VTT", 3, 0, 10, 1, 0 }, | ||
| 565 | { "MCH 1.25V", 4, 0, 10, 1, 0 }, | ||
| 566 | { "ICHIO 1.5V", 5, 0, 10, 1, 0 }, | ||
| 567 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
| 568 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
| 569 | { "ATX +12V (8-pin)", 8, 0, 60, 1, 0 }, | ||
| 570 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
| 571 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
| 572 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
| 573 | { "CPU", 24, 1, 1, 1, 0 }, | ||
| 574 | { "System", 25, 1, 1, 1, 0 }, | ||
| 575 | { "PWM Phase1", 26, 1, 1, 1, 0 }, | ||
| 576 | { "PWM Phase2", 27, 1, 1, 1, 0 }, | ||
| 577 | { "PWM Phase3", 28, 1, 1, 1, 0 }, | ||
| 578 | { "PWM Phase4", 29, 1, 1, 1, 0 }, | ||
| 579 | { "PWM Phase5", 30, 1, 1, 1, 0 }, | ||
| 580 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
| 581 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
| 582 | { "AUX1 Fan", 33, 2, 60, 1, 0 }, | ||
| 583 | { "AUX2 Fan", 35, 2, 60, 1, 0 }, | ||
| 584 | { "AUX3 Fan", 36, 2, 60, 1, 0 }, | ||
| 585 | { NULL, 0, 0, 0, 0, 0 } } | ||
| 586 | }, | ||
| 533 | { 0x0000, NULL, { { NULL, 0, 0, 0, 0, 0 } } } | 587 | { 0x0000, NULL, { { NULL, 0, 0, 0, 0, 0 } } } |
| 534 | }; | 588 | }; |
| 535 | 589 | ||