diff options
author | Éric Piel <eric.piel@tremplin-utc.net> | 2009-12-14 21:01:40 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-15 11:53:36 -0500 |
commit | 4b5d95b3809bcd77599122494aa3f575cd6ab1b9 (patch) | |
tree | 1c3a0d267ec911353404e77e3cd4f01d3e930584 /drivers/hwmon | |
parent | bc62c1471773fc32adcfc05100abd16fa2b6e126 (diff) |
lis3: fix show rate for 8 bits chips
Originally the driver was only targeted to 12bits sensors. When support
for 8bits sensors was added, some slight difference in the registers were
overlooked. This should fix it, both for initialization, and for
displaying the rate.
Reported-by: Kalhan Trisal <kalhan.trisal@intel.com>
Reported-by: Christoph Plattner <christoph.plattner@gmx.at>
Tested-by: Christoph Plattner <christoph.plattner@gmx.at>
Tested-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Signed-off-by: Éric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Cc: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/hwmon')
-rw-r--r-- | drivers/hwmon/lis3lv02d.c | 24 | ||||
-rw-r--r-- | drivers/hwmon/lis3lv02d.h | 1 |
2 files changed, 17 insertions, 8 deletions
diff --git a/drivers/hwmon/lis3lv02d.c b/drivers/hwmon/lis3lv02d.c index 1c8f10817e69..b12ee359d90e 100644 --- a/drivers/hwmon/lis3lv02d.c +++ b/drivers/hwmon/lis3lv02d.c | |||
@@ -127,12 +127,14 @@ void lis3lv02d_poweron(struct lis3lv02d *lis3) | |||
127 | 127 | ||
128 | /* | 128 | /* |
129 | * Common configuration | 129 | * Common configuration |
130 | * BDU: LSB and MSB values are not updated until both have been read. | 130 | * BDU: (12 bits sensors only) LSB and MSB values are not updated until |
131 | * So the value read will always be correct. | 131 | * both have been read. So the value read will always be correct. |
132 | */ | 132 | */ |
133 | lis3->read(lis3, CTRL_REG2, ®); | 133 | if (lis3->whoami == WAI_12B) { |
134 | reg |= CTRL2_BDU; | 134 | lis3->read(lis3, CTRL_REG2, ®); |
135 | lis3->write(lis3, CTRL_REG2, reg); | 135 | reg |= CTRL2_BDU; |
136 | lis3->write(lis3, CTRL_REG2, reg); | ||
137 | } | ||
136 | } | 138 | } |
137 | EXPORT_SYMBOL_GPL(lis3lv02d_poweron); | 139 | EXPORT_SYMBOL_GPL(lis3lv02d_poweron); |
138 | 140 | ||
@@ -363,7 +365,8 @@ static ssize_t lis3lv02d_calibrate_store(struct device *dev, | |||
363 | } | 365 | } |
364 | 366 | ||
365 | /* conversion btw sampling rate and the register values */ | 367 | /* conversion btw sampling rate and the register values */ |
366 | static int lis3lv02dl_df_val[4] = {40, 160, 640, 2560}; | 368 | static int lis3_12_rates[4] = {40, 160, 640, 2560}; |
369 | static int lis3_8_rates[2] = {100, 400}; | ||
367 | static ssize_t lis3lv02d_rate_show(struct device *dev, | 370 | static ssize_t lis3lv02d_rate_show(struct device *dev, |
368 | struct device_attribute *attr, char *buf) | 371 | struct device_attribute *attr, char *buf) |
369 | { | 372 | { |
@@ -371,8 +374,13 @@ static ssize_t lis3lv02d_rate_show(struct device *dev, | |||
371 | int val; | 374 | int val; |
372 | 375 | ||
373 | lis3_dev.read(&lis3_dev, CTRL_REG1, &ctrl); | 376 | lis3_dev.read(&lis3_dev, CTRL_REG1, &ctrl); |
374 | val = (ctrl & (CTRL1_DF0 | CTRL1_DF1)) >> 4; | 377 | |
375 | return sprintf(buf, "%d\n", lis3lv02dl_df_val[val]); | 378 | if (lis3_dev.whoami == WAI_12B) |
379 | val = lis3_12_rates[(ctrl & (CTRL1_DF0 | CTRL1_DF1)) >> 4]; | ||
380 | else | ||
381 | val = lis3_8_rates[(ctrl & CTRL1_DR) >> 7]; | ||
382 | |||
383 | return sprintf(buf, "%d\n", val); | ||
376 | } | 384 | } |
377 | 385 | ||
378 | static DEVICE_ATTR(position, S_IRUGO, lis3lv02d_position_show, NULL); | 386 | static DEVICE_ATTR(position, S_IRUGO, lis3lv02d_position_show, NULL); |
diff --git a/drivers/hwmon/lis3lv02d.h b/drivers/hwmon/lis3lv02d.h index 2431c5199534..c6ae507e4f1e 100644 --- a/drivers/hwmon/lis3lv02d.h +++ b/drivers/hwmon/lis3lv02d.h | |||
@@ -107,6 +107,7 @@ enum lis3lv02d_ctrl1 { | |||
107 | CTRL1_DF1 = 0x20, | 107 | CTRL1_DF1 = 0x20, |
108 | CTRL1_PD0 = 0x40, | 108 | CTRL1_PD0 = 0x40, |
109 | CTRL1_PD1 = 0x80, | 109 | CTRL1_PD1 = 0x80, |
110 | CTRL1_DR = 0x80, /* Data rate on 8 bits */ | ||
110 | }; | 111 | }; |
111 | enum lis3lv02d_ctrl2 { | 112 | enum lis3lv02d_ctrl2 { |
112 | CTRL2_DAS = 0x01, | 113 | CTRL2_DAS = 0x01, |