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authorJean Delvare <khali@linux-fr.org>2008-05-01 02:47:33 -0400
committerMark M. Hoffman <mhoffman@lightlink.com>2008-07-31 23:44:03 -0400
commitdd1ac5384a08946a99e974bf5749d382e92ed3c0 (patch)
tree67f91863ab47e0db01ecb7ef99d7b7998915c821 /drivers/hwmon
parent1f44809ac3d7a3fc977684dc3a95fa221f33fc15 (diff)
hwmon: (lm85) Drop dead code
Drop a lot of useless register defines, conversion macros, data structure members and update code. All these register values were read from the device but nothing is done out of them, so this is all dead code in practice. Signed-off-by: Jean Delvare <khali@linux-fr.org> Acked-by: Juerg Haefliger <juergh at gmail.com> Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
Diffstat (limited to 'drivers/hwmon')
-rw-r--r--drivers/hwmon/lm85.c82
1 files changed, 2 insertions, 80 deletions
diff --git a/drivers/hwmon/lm85.c b/drivers/hwmon/lm85.c
index 0c0fede8dde9..0d31435b333c 100644
--- a/drivers/hwmon/lm85.c
+++ b/drivers/hwmon/lm85.c
@@ -56,16 +56,9 @@ I2C_CLIENT_INSMOD_6(lm85b, lm85c, adm1027, adt7463, emc6d100, emc6d102);
56 56
57#define LM85_REG_PWM(nr) (0x30 + (nr)) 57#define LM85_REG_PWM(nr) (0x30 + (nr))
58 58
59#define ADT7463_REG_OPPOINT(nr) (0x33 + (nr))
60
61#define ADT7463_REG_TMIN_CTL1 0x36
62#define ADT7463_REG_TMIN_CTL2 0x37
63
64#define LM85_REG_DEVICE 0x3d
65#define LM85_REG_COMPANY 0x3e 59#define LM85_REG_COMPANY 0x3e
66#define LM85_REG_VERSTEP 0x3f 60#define LM85_REG_VERSTEP 0x3f
67/* These are the recognized values for the above regs */ 61/* These are the recognized values for the above regs */
68#define LM85_DEVICE_ADX 0x27
69#define LM85_COMPANY_NATIONAL 0x01 62#define LM85_COMPANY_NATIONAL 0x01
70#define LM85_COMPANY_ANALOG_DEV 0x41 63#define LM85_COMPANY_ANALOG_DEV 0x41
71#define LM85_COMPANY_SMSC 0x5c 64#define LM85_COMPANY_SMSC 0x5c
@@ -91,27 +84,14 @@ I2C_CLIENT_INSMOD_6(lm85b, lm85c, adm1027, adt7463, emc6d100, emc6d102);
91#define LM85_REG_AFAN_CONFIG(nr) (0x5c + (nr)) 84#define LM85_REG_AFAN_CONFIG(nr) (0x5c + (nr))
92#define LM85_REG_AFAN_RANGE(nr) (0x5f + (nr)) 85#define LM85_REG_AFAN_RANGE(nr) (0x5f + (nr))
93#define LM85_REG_AFAN_SPIKE1 0x62 86#define LM85_REG_AFAN_SPIKE1 0x62
94#define LM85_REG_AFAN_SPIKE2 0x63
95#define LM85_REG_AFAN_MINPWM(nr) (0x64 + (nr)) 87#define LM85_REG_AFAN_MINPWM(nr) (0x64 + (nr))
96#define LM85_REG_AFAN_LIMIT(nr) (0x67 + (nr)) 88#define LM85_REG_AFAN_LIMIT(nr) (0x67 + (nr))
97#define LM85_REG_AFAN_CRITICAL(nr) (0x6a + (nr)) 89#define LM85_REG_AFAN_CRITICAL(nr) (0x6a + (nr))
98#define LM85_REG_AFAN_HYST1 0x6d 90#define LM85_REG_AFAN_HYST1 0x6d
99#define LM85_REG_AFAN_HYST2 0x6e 91#define LM85_REG_AFAN_HYST2 0x6e
100 92
101#define LM85_REG_TACH_MODE 0x74
102#define LM85_REG_SPINUP_CTL 0x75
103
104#define ADM1027_REG_TEMP_OFFSET(nr) (0x70 + (nr))
105#define ADM1027_REG_CONFIG2 0x73
106#define ADM1027_REG_INTMASK1 0x74
107#define ADM1027_REG_INTMASK2 0x75
108#define ADM1027_REG_EXTEND_ADC1 0x76 93#define ADM1027_REG_EXTEND_ADC1 0x76
109#define ADM1027_REG_EXTEND_ADC2 0x77 94#define ADM1027_REG_EXTEND_ADC2 0x77
110#define ADM1027_REG_CONFIG3 0x78
111#define ADM1027_REG_FAN_PPR 0x7b
112
113#define ADT7463_REG_THERM 0x79
114#define ADT7463_REG_THERM_LIMIT 0x7A
115 95
116#define EMC6D100_REG_ALARM3 0x7d 96#define EMC6D100_REG_ALARM3 0x7d
117/* IN5, IN6 and IN7 */ 97/* IN5, IN6 and IN7 */
@@ -263,13 +243,6 @@ static int ZONE_TO_REG(int zone)
263#define HYST_TO_REG(val) SENSORS_LIMIT(((val) + 500) / 1000, 0, 15) 243#define HYST_TO_REG(val) SENSORS_LIMIT(((val) + 500) / 1000, 0, 15)
264#define HYST_FROM_REG(val) ((val) * 1000) 244#define HYST_FROM_REG(val) ((val) * 1000)
265 245
266#define OFFSET_TO_REG(val) SENSORS_LIMIT((val) / 25, -127, 127)
267#define OFFSET_FROM_REG(val) ((val) * 25)
268
269#define PPR_MASK(fan) (0x03 << ((fan) * 2))
270#define PPR_TO_REG(val, fan) (SENSORS_LIMIT((val) - 1, 0, 3) << ((fan) * 2))
271#define PPR_FROM_REG(val, fan) ((((val) >> ((fan) * 2)) & 0x03) + 1)
272
273/* Chip sampling rates 246/* Chip sampling rates
274 * 247 *
275 * Some sensors are not updated more frequently than once per second 248 * Some sensors are not updated more frequently than once per second
@@ -330,23 +303,15 @@ struct lm85_data {
330 s8 temp[3]; /* Register value */ 303 s8 temp[3]; /* Register value */
331 s8 temp_min[3]; /* Register value */ 304 s8 temp_min[3]; /* Register value */
332 s8 temp_max[3]; /* Register value */ 305 s8 temp_max[3]; /* Register value */
333 s8 temp_offset[3]; /* Register value */
334 u16 fan[4]; /* Register value */ 306 u16 fan[4]; /* Register value */
335 u16 fan_min[4]; /* Register value */ 307 u16 fan_min[4]; /* Register value */
336 u8 pwm[3]; /* Register value */ 308 u8 pwm[3]; /* Register value */
337 u8 spinup_ctl; /* Register encoding, combined */
338 u8 tach_mode; /* Register encoding, combined */
339 u8 temp_ext[3]; /* Decoded values */ 309 u8 temp_ext[3]; /* Decoded values */
340 u8 in_ext[8]; /* Decoded values */ 310 u8 in_ext[8]; /* Decoded values */
341 u8 fan_ppr; /* Register value */ 311 u8 smooth[1]; /* Register encoding */
342 u8 smooth[3]; /* Register encoding */
343 u8 vid; /* Register value */ 312 u8 vid; /* Register value */
344 u8 vrm; /* VRM version */ 313 u8 vrm; /* VRM version */
345 u8 syncpwm3; /* Saved PWM3 for TACH 2,3,4 config */ 314 u8 syncpwm3; /* Saved PWM3 for TACH 2,3,4 config */
346 u8 oppoint[3]; /* Register value */
347 u16 tmin_ctl; /* Register value */
348 unsigned long therm_total; /* Cummulative therm count */
349 u8 therm_limit; /* Register value */
350 u32 alarms; /* Register encoding, combined */ 315 u32 alarms; /* Register encoding, combined */
351 struct lm85_autofan autofan[3]; 316 struct lm85_autofan autofan[3];
352 struct lm85_zone zone[3]; 317 struct lm85_zone zone[3];
@@ -1335,10 +1300,6 @@ static int lm85_read_value(struct i2c_client *client, u8 reg)
1335 res = i2c_smbus_read_byte_data(client, reg) & 0xff; 1300 res = i2c_smbus_read_byte_data(client, reg) & 0xff;
1336 res |= i2c_smbus_read_byte_data(client, reg + 1) << 8; 1301 res |= i2c_smbus_read_byte_data(client, reg + 1) << 8;
1337 break; 1302 break;
1338 case ADT7463_REG_TMIN_CTL1: /* Read WORD MSB, LSB */
1339 res = i2c_smbus_read_byte_data(client, reg) << 8;
1340 res |= i2c_smbus_read_byte_data(client, reg + 1) & 0xff;
1341 break;
1342 default: /* Read BYTE data */ 1303 default: /* Read BYTE data */
1343 res = i2c_smbus_read_byte_data(client, reg); 1304 res = i2c_smbus_read_byte_data(client, reg);
1344 break; 1305 break;
@@ -1365,11 +1326,6 @@ static int lm85_write_value(struct i2c_client *client, u8 reg, int value)
1365 res |= i2c_smbus_write_byte_data(client, reg + 1, 1326 res |= i2c_smbus_write_byte_data(client, reg + 1,
1366 (value >> 8) & 0xff); 1327 (value >> 8) & 0xff);
1367 break; 1328 break;
1368 case ADT7463_REG_TMIN_CTL1: /* Write WORD MSB, LSB */
1369 res = i2c_smbus_write_byte_data(client, reg,
1370 (value >> 8) & 0xff);
1371 res |= i2c_smbus_write_byte_data(client, reg + 1, value & 0xff);
1372 break;
1373 default: /* Write BYTE data */ 1329 default: /* Write BYTE data */
1374 res = i2c_smbus_write_byte_data(client, reg, value); 1330 res = i2c_smbus_write_byte_data(client, reg, value);
1375 break; 1331 break;
@@ -1483,12 +1439,7 @@ static struct lm85_data *lm85_update_device(struct device *dev)
1483 1439
1484 data->alarms = lm85_read_value(client, LM85_REG_ALARM1); 1440 data->alarms = lm85_read_value(client, LM85_REG_ALARM1);
1485 1441
1486 if (data->type == adt7463) { 1442 if (data->type == emc6d100) {
1487 if (data->therm_total < ULONG_MAX - 256) {
1488 data->therm_total +=
1489 lm85_read_value(client, ADT7463_REG_THERM);
1490 }
1491 } else if (data->type == emc6d100) {
1492 /* Three more voltage sensors */ 1443 /* Three more voltage sensors */
1493 for (i = 5; i <= 7; ++i) { 1444 for (i = 5; i <= 7; ++i) {
1494 data->in[i] = lm85_read_value(client, 1445 data->in[i] = lm85_read_value(client,
@@ -1585,9 +1536,6 @@ static struct lm85_data *lm85_update_device(struct device *dev)
1585 data->autofan[0].min_off = (i & 0x20) != 0; 1536 data->autofan[0].min_off = (i & 0x20) != 0;
1586 data->autofan[1].min_off = (i & 0x40) != 0; 1537 data->autofan[1].min_off = (i & 0x40) != 0;
1587 data->autofan[2].min_off = (i & 0x80) != 0; 1538 data->autofan[2].min_off = (i & 0x80) != 0;
1588 i = lm85_read_value(client, LM85_REG_AFAN_SPIKE2);
1589 data->smooth[1] = (i >> 4) & 0x0f;
1590 data->smooth[2] = i & 0x0f;
1591 1539
1592 i = lm85_read_value(client, LM85_REG_AFAN_HYST1); 1540 i = lm85_read_value(client, LM85_REG_AFAN_HYST1);
1593 data->zone[0].hyst = (i >> 4) & 0x0f; 1541 data->zone[0].hyst = (i >> 4) & 0x0f;
@@ -1596,32 +1544,6 @@ static struct lm85_data *lm85_update_device(struct device *dev)
1596 i = lm85_read_value(client, LM85_REG_AFAN_HYST2); 1544 i = lm85_read_value(client, LM85_REG_AFAN_HYST2);
1597 data->zone[2].hyst = (i >> 4) & 0x0f; 1545 data->zone[2].hyst = (i >> 4) & 0x0f;
1598 1546
1599 if (data->type == lm85b || data->type == lm85c) {
1600 data->tach_mode = lm85_read_value(client,
1601 LM85_REG_TACH_MODE);
1602 data->spinup_ctl = lm85_read_value(client,
1603 LM85_REG_SPINUP_CTL);
1604 } else if (data->type == adt7463 || data->type == adm1027) {
1605 if (data->type == adt7463) {
1606 for (i = 0; i <= 2; ++i) {
1607 data->oppoint[i] = lm85_read_value(client,
1608 ADT7463_REG_OPPOINT(i));
1609 }
1610 data->tmin_ctl = lm85_read_value(client,
1611 ADT7463_REG_TMIN_CTL1);
1612 data->therm_limit = lm85_read_value(client,
1613 ADT7463_REG_THERM_LIMIT);
1614 }
1615 for (i = 0; i <= 2; ++i) {
1616 data->temp_offset[i] = lm85_read_value(client,
1617 ADM1027_REG_TEMP_OFFSET(i));
1618 }
1619 data->tach_mode = lm85_read_value(client,
1620 ADM1027_REG_CONFIG3);
1621 data->fan_ppr = lm85_read_value(client,
1622 ADM1027_REG_FAN_PPR);
1623 }
1624
1625 data->last_config = jiffies; 1547 data->last_config = jiffies;
1626 } /* last_config */ 1548 } /* last_config */
1627 1549