diff options
author | Jean Delvare <khali@linux-fr.org> | 2011-10-13 10:43:14 -0400 |
---|---|---|
committer | Guenter Roeck <guenter.roeck@ericsson.com> | 2011-10-24 14:09:46 -0400 |
commit | 03f5de2bb7125e537c81030925f38674307e6a71 (patch) | |
tree | e01ed88715f121140a8e3f673b29c128d8de604d /drivers/hwmon | |
parent | 389ef65d2eae579b23af719f5ef18d625f41fada (diff) |
hwmon: (w83627ehf) Move fan pins check to a separate function
Move the check of fan pin usage to a separate function. This improves
readability, and will make it easier to integrate chip-specific
conditions.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Diffstat (limited to 'drivers/hwmon')
-rw-r--r-- | drivers/hwmon/w83627ehf.c | 120 |
1 files changed, 67 insertions, 53 deletions
diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c index c77a4b92ebc9..f5fec1cd1d4e 100644 --- a/drivers/hwmon/w83627ehf.c +++ b/drivers/hwmon/w83627ehf.c | |||
@@ -1844,13 +1844,78 @@ static void w82627ehf_swap_tempreg(struct w83627ehf_data *data, | |||
1844 | data->reg_temp_config[r2] = tmp; | 1844 | data->reg_temp_config[r2] = tmp; |
1845 | } | 1845 | } |
1846 | 1846 | ||
1847 | static void __devinit | ||
1848 | w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data, | ||
1849 | struct w83627ehf_data *data) | ||
1850 | { | ||
1851 | int fan3pin, fan4pin, fan4min, fan5pin, regval; | ||
1852 | |||
1853 | superio_enter(sio_data->sioreg); | ||
1854 | |||
1855 | /* fan4 and fan5 share some pins with the GPIO and serial flash */ | ||
1856 | if (sio_data->kind == nct6775) { | ||
1857 | /* On NCT6775, fan4 shares pins with the fdc interface */ | ||
1858 | fan3pin = 1; | ||
1859 | fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80); | ||
1860 | fan4min = 0; | ||
1861 | fan5pin = 0; | ||
1862 | } else if (sio_data->kind == nct6776) { | ||
1863 | fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40); | ||
1864 | fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01); | ||
1865 | fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02); | ||
1866 | fan4min = fan4pin; | ||
1867 | } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) { | ||
1868 | fan3pin = 1; | ||
1869 | fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40; | ||
1870 | fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20; | ||
1871 | fan4min = fan4pin; | ||
1872 | } else { | ||
1873 | fan3pin = 1; | ||
1874 | fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06); | ||
1875 | fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02); | ||
1876 | fan4min = fan4pin; | ||
1877 | } | ||
1878 | |||
1879 | superio_exit(sio_data->sioreg); | ||
1880 | |||
1881 | data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */ | ||
1882 | data->has_fan |= (fan3pin << 2); | ||
1883 | data->has_fan_min |= (fan3pin << 2); | ||
1884 | |||
1885 | if (sio_data->kind == nct6775 || sio_data->kind == nct6776) { | ||
1886 | /* | ||
1887 | * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1 | ||
1888 | * register | ||
1889 | */ | ||
1890 | data->has_fan |= (fan4pin << 3) | (fan5pin << 4); | ||
1891 | data->has_fan_min |= (fan4min << 3) | (fan5pin << 4); | ||
1892 | } else { | ||
1893 | /* | ||
1894 | * It looks like fan4 and fan5 pins can be alternatively used | ||
1895 | * as fan on/off switches, but fan5 control is write only :/ | ||
1896 | * We assume that if the serial interface is disabled, designers | ||
1897 | * connected fan5 as input unless they are emitting log 1, which | ||
1898 | * is not the default. | ||
1899 | */ | ||
1900 | regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1); | ||
1901 | if ((regval & (1 << 2)) && fan4pin) { | ||
1902 | data->has_fan |= (1 << 3); | ||
1903 | data->has_fan_min |= (1 << 3); | ||
1904 | } | ||
1905 | if (!(regval & (1 << 1)) && fan5pin) { | ||
1906 | data->has_fan |= (1 << 4); | ||
1907 | data->has_fan_min |= (1 << 4); | ||
1908 | } | ||
1909 | } | ||
1910 | } | ||
1911 | |||
1847 | static int __devinit w83627ehf_probe(struct platform_device *pdev) | 1912 | static int __devinit w83627ehf_probe(struct platform_device *pdev) |
1848 | { | 1913 | { |
1849 | struct device *dev = &pdev->dev; | 1914 | struct device *dev = &pdev->dev; |
1850 | struct w83627ehf_sio_data *sio_data = dev->platform_data; | 1915 | struct w83627ehf_sio_data *sio_data = dev->platform_data; |
1851 | struct w83627ehf_data *data; | 1916 | struct w83627ehf_data *data; |
1852 | struct resource *res; | 1917 | struct resource *res; |
1853 | u8 fan3pin, fan4pin, fan4min, fan5pin, en_vrm10; | 1918 | u8 en_vrm10; |
1854 | int i, err = 0; | 1919 | int i, err = 0; |
1855 | 1920 | ||
1856 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | 1921 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
@@ -2135,30 +2200,6 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev) | |||
2135 | } | 2200 | } |
2136 | } | 2201 | } |
2137 | 2202 | ||
2138 | /* fan4 and fan5 share some pins with the GPIO and serial flash */ | ||
2139 | if (sio_data->kind == nct6775) { | ||
2140 | /* On NCT6775, fan4 shares pins with the fdc interface */ | ||
2141 | fan3pin = 1; | ||
2142 | fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80); | ||
2143 | fan4min = 0; | ||
2144 | fan5pin = 0; | ||
2145 | } else if (sio_data->kind == nct6776) { | ||
2146 | fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40); | ||
2147 | fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01); | ||
2148 | fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02); | ||
2149 | fan4min = fan4pin; | ||
2150 | } else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) { | ||
2151 | fan3pin = 1; | ||
2152 | fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40; | ||
2153 | fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20; | ||
2154 | fan4min = fan4pin; | ||
2155 | } else { | ||
2156 | fan3pin = 1; | ||
2157 | fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06); | ||
2158 | fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02); | ||
2159 | fan4min = fan4pin; | ||
2160 | } | ||
2161 | |||
2162 | if (fan_debounce && | 2203 | if (fan_debounce && |
2163 | (sio_data->kind == nct6775 || sio_data->kind == nct6776)) { | 2204 | (sio_data->kind == nct6775 || sio_data->kind == nct6776)) { |
2164 | u8 tmp; | 2205 | u8 tmp; |
@@ -2176,34 +2217,7 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev) | |||
2176 | 2217 | ||
2177 | superio_exit(sio_data->sioreg); | 2218 | superio_exit(sio_data->sioreg); |
2178 | 2219 | ||
2179 | /* It looks like fan4 and fan5 pins can be alternatively used | 2220 | w83627ehf_check_fan_inputs(sio_data, data); |
2180 | as fan on/off switches, but fan5 control is write only :/ | ||
2181 | We assume that if the serial interface is disabled, designers | ||
2182 | connected fan5 as input unless they are emitting log 1, which | ||
2183 | is not the default. */ | ||
2184 | |||
2185 | data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */ | ||
2186 | |||
2187 | data->has_fan |= (fan3pin << 2); | ||
2188 | data->has_fan_min |= (fan3pin << 2); | ||
2189 | |||
2190 | /* | ||
2191 | * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1 register | ||
2192 | */ | ||
2193 | if (sio_data->kind == nct6775 || sio_data->kind == nct6776) { | ||
2194 | data->has_fan |= (fan4pin << 3) | (fan5pin << 4); | ||
2195 | data->has_fan_min |= (fan4min << 3) | (fan5pin << 4); | ||
2196 | } else { | ||
2197 | i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1); | ||
2198 | if ((i & (1 << 2)) && fan4pin) { | ||
2199 | data->has_fan |= (1 << 3); | ||
2200 | data->has_fan_min |= (1 << 3); | ||
2201 | } | ||
2202 | if (!(i & (1 << 1)) && fan5pin) { | ||
2203 | data->has_fan |= (1 << 4); | ||
2204 | data->has_fan_min |= (1 << 4); | ||
2205 | } | ||
2206 | } | ||
2207 | 2221 | ||
2208 | /* Read fan clock dividers immediately */ | 2222 | /* Read fan clock dividers immediately */ |
2209 | w83627ehf_update_fan_div_common(dev, data); | 2223 | w83627ehf_update_fan_div_common(dev, data); |