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authorRudolf Marek <r.marek@sh.cvut.cz>2006-06-12 16:00:53 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-06-22 14:10:36 -0400
commit6af586dc58820d052aa538abef4d4d15c2a9e33e (patch)
tree8ff2ba7d6fd130259e099df3771694c5961bf924 /drivers/hwmon
parente1a8e913f97e36cc5a23a24a8b4717e84998f13c (diff)
[PATCH] hwmon-vid: Add support for Intel Core and Conroe
This patch adds support for two new VID codes, supporting Intel mobile Core processors and new Conroe based platforms. Signed-off-by: Rudolf Marek <r.marek@sh.cvut.cz> Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/hwmon')
-rw-r--r--drivers/hwmon/hwmon-vid.c35
1 files changed, 28 insertions, 7 deletions
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c
index b0fd267635bb..a6764ff00803 100644
--- a/drivers/hwmon/hwmon-vid.c
+++ b/drivers/hwmon/hwmon-vid.c
@@ -58,11 +58,20 @@
58 doesn't seem to be any named specification for these. The conversion 58 doesn't seem to be any named specification for these. The conversion
59 tables are detailed directly in the various Pentium M datasheets: 59 tables are detailed directly in the various Pentium M datasheets:
60 http://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm 60 http://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm
61
62 The 14 specification corresponds to Intel Core series. There
63 doesn't seem to be any named specification for these. The conversion
64 tables are detailed directly in the various Pentium Core datasheets:
65 http://www.intel.com/design/mobile/datashts/309221.htm
66
67 The 110 (VRM 11) specification corresponds to Intel Conroe based series.
68 http://www.intel.com/design/processor/applnots/313214.htm
61*/ 69*/
62 70
63/* vrm is the VRM/VRD document version multiplied by 10. 71/* vrm is the VRM/VRD document version multiplied by 10.
64 val is the 4-, 5- or 6-bit VID code. 72 val is the 4-bit or more VID code.
65 Returned value is in mV to avoid floating point in the kernel. */ 73 Returned value is in mV to avoid floating point in the kernel.
74 Some VID have some bits in uV scale, this is rounded to mV */
66int vid_from_reg(int val, u8 vrm) 75int vid_from_reg(int val, u8 vrm)
67{ 76{
68 int vid; 77 int vid;
@@ -70,18 +79,24 @@ int vid_from_reg(int val, u8 vrm)
70 switch(vrm) { 79 switch(vrm) {
71 80
72 case 100: /* VRD 10.0 */ 81 case 100: /* VRD 10.0 */
82 /* compute in uV, round to mV */
73 val &= 0x3f; 83 val &= 0x3f;
74 if((val & 0x1f) == 0x1f) 84 if((val & 0x1f) == 0x1f)
75 return 0; 85 return 0;
76 if((val & 0x1f) <= 0x09 || val == 0x0a) 86 if((val & 0x1f) <= 0x09 || val == 0x0a)
77 vid = 10875 - (val & 0x1f) * 250; 87 vid = 1087500 - (val & 0x1f) * 25000;
78 else 88 else
79 vid = 18625 - (val & 0x1f) * 250; 89 vid = 1862500 - (val & 0x1f) * 25000;
80 if(val & 0x20) 90 if(val & 0x20)
81 vid -= 125; 91 vid -= 12500;
82 vid /= 10; /* only return 3 dec. places for now */ 92 return((vid + 500) / 1000);
83 return vid;
84 93
94 case 110: /* Intel Conroe */
95 /* compute in uV, round to mV */
96 val &= 0xff;
97 if(((val & 0x7e) == 0xfe) || (!(val & 0x7e)))
98 return 0;
99 return((1600000 - (val - 2) * 6250 + 500) / 1000);
85 case 24: /* Opteron processor */ 100 case 24: /* Opteron processor */
86 val &= 0x1f; 101 val &= 0x1f;
87 return(val == 0x1f ? 0 : 1550 - val * 25); 102 return(val == 0x1f ? 0 : 1550 - val * 25);
@@ -113,6 +128,10 @@ int vid_from_reg(int val, u8 vrm)
113 case 13: 128 case 13:
114 val &= 0x3f; 129 val &= 0x3f;
115 return(1708 - val * 16); 130 return(1708 - val * 16);
131 case 14: /* Intel Core */
132 /* compute in uV, round to mV */
133 val &= 0x7f;
134 return(val > 0x77 ? 0 : (1500000 - (val * 12500) + 500) / 1000);
116 default: /* report 0 for unknown */ 135 default: /* report 0 for unknown */
117 printk(KERN_INFO "hwmon-vid: requested unknown VRM version\n"); 136 printk(KERN_INFO "hwmon-vid: requested unknown VRM version\n");
118 return 0; 137 return 0;
@@ -145,6 +164,8 @@ static struct vrm_model vrm_models[] = {
145 {X86_VENDOR_INTEL, 0x6, 0x9, ANY, 13}, /* Pentium M (130 nm) */ 164 {X86_VENDOR_INTEL, 0x6, 0x9, ANY, 13}, /* Pentium M (130 nm) */
146 {X86_VENDOR_INTEL, 0x6, 0xB, ANY, 85}, /* Tualatin */ 165 {X86_VENDOR_INTEL, 0x6, 0xB, ANY, 85}, /* Tualatin */
147 {X86_VENDOR_INTEL, 0x6, 0xD, ANY, 13}, /* Pentium M (90 nm) */ 166 {X86_VENDOR_INTEL, 0x6, 0xD, ANY, 13}, /* Pentium M (90 nm) */
167 {X86_VENDOR_INTEL, 0x6, 0xE, ANY, 14}, /* Intel Core (65 nm) */
168 {X86_VENDOR_INTEL, 0x6, 0xF, ANY, 110}, /* Intel Conroe */
148 {X86_VENDOR_INTEL, 0x6, ANY, ANY, 82}, /* any P6 */ 169 {X86_VENDOR_INTEL, 0x6, ANY, ANY, 82}, /* any P6 */
149 {X86_VENDOR_INTEL, 0x7, ANY, ANY, 0}, /* Itanium */ 170 {X86_VENDOR_INTEL, 0x7, ANY, ANY, 0}, /* Itanium */
150 {X86_VENDOR_INTEL, 0xF, 0x0, ANY, 90}, /* P4 */ 171 {X86_VENDOR_INTEL, 0xF, 0x0, ANY, 90}, /* P4 */