diff options
| author | Guenter Roeck <linux@roeck-us.net> | 2012-02-23 22:33:55 -0500 |
|---|---|---|
| committer | Guenter Roeck <guenter.roeck@ericsson.com> | 2012-03-18 21:27:51 -0400 |
| commit | 60b873e3329891cd86cf5a2629157dc0022f8beb (patch) | |
| tree | 80bf1c92c74a2e5247e3b24ed6845b6d171687b0 /drivers/hwmon/pmbus/pmbus.h | |
| parent | 216334094a875ed350079fb0b1b057ca17eb8b8e (diff) | |
hwmon: (pmbus) Add more virtual registers
Add PMBUS_VIRT_READ_TEMP_AVG, PMBUS_VIRT_READ_TEMP2_AVG,
PMBUS_VIRT_READ_POUT_AVG, PMBUS_VIRT_READ_POUT_MAX,
and PMBUS_VIRT_RESET_POUT_HISTORY.
We'll need those for MAX34446.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'drivers/hwmon/pmbus/pmbus.h')
| -rw-r--r-- | drivers/hwmon/pmbus/pmbus.h | 55 |
1 files changed, 30 insertions, 25 deletions
diff --git a/drivers/hwmon/pmbus/pmbus.h b/drivers/hwmon/pmbus/pmbus.h index 0b17d4f20f81..3fe03dc47eb7 100644 --- a/drivers/hwmon/pmbus/pmbus.h +++ b/drivers/hwmon/pmbus/pmbus.h | |||
| @@ -146,31 +146,36 @@ | |||
| 146 | * code when reading or writing virtual registers. | 146 | * code when reading or writing virtual registers. |
| 147 | */ | 147 | */ |
| 148 | #define PMBUS_VIRT_BASE 0x100 | 148 | #define PMBUS_VIRT_BASE 0x100 |
| 149 | #define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 0) | 149 | #define PMBUS_VIRT_READ_TEMP_AVG (PMBUS_VIRT_BASE + 0) |
| 150 | #define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 1) | 150 | #define PMBUS_VIRT_READ_TEMP_MIN (PMBUS_VIRT_BASE + 1) |
| 151 | #define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 2) | 151 | #define PMBUS_VIRT_READ_TEMP_MAX (PMBUS_VIRT_BASE + 2) |
| 152 | #define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 3) | 152 | #define PMBUS_VIRT_RESET_TEMP_HISTORY (PMBUS_VIRT_BASE + 3) |
| 153 | #define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 4) | 153 | #define PMBUS_VIRT_READ_VIN_AVG (PMBUS_VIRT_BASE + 4) |
| 154 | #define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 5) | 154 | #define PMBUS_VIRT_READ_VIN_MIN (PMBUS_VIRT_BASE + 5) |
| 155 | #define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 6) | 155 | #define PMBUS_VIRT_READ_VIN_MAX (PMBUS_VIRT_BASE + 6) |
| 156 | #define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 7) | 156 | #define PMBUS_VIRT_RESET_VIN_HISTORY (PMBUS_VIRT_BASE + 7) |
| 157 | #define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 8) | 157 | #define PMBUS_VIRT_READ_IIN_AVG (PMBUS_VIRT_BASE + 8) |
| 158 | #define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 9) | 158 | #define PMBUS_VIRT_READ_IIN_MIN (PMBUS_VIRT_BASE + 9) |
| 159 | #define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 10) | 159 | #define PMBUS_VIRT_READ_IIN_MAX (PMBUS_VIRT_BASE + 10) |
| 160 | #define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 11) | 160 | #define PMBUS_VIRT_RESET_IIN_HISTORY (PMBUS_VIRT_BASE + 11) |
| 161 | #define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 12) | 161 | #define PMBUS_VIRT_READ_PIN_AVG (PMBUS_VIRT_BASE + 12) |
| 162 | #define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 13) | 162 | #define PMBUS_VIRT_READ_PIN_MAX (PMBUS_VIRT_BASE + 13) |
| 163 | #define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 14) | 163 | #define PMBUS_VIRT_RESET_PIN_HISTORY (PMBUS_VIRT_BASE + 14) |
| 164 | #define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 15) | 164 | #define PMBUS_VIRT_READ_POUT_AVG (PMBUS_VIRT_BASE + 15) |
| 165 | #define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 16) | 165 | #define PMBUS_VIRT_READ_POUT_MAX (PMBUS_VIRT_BASE + 16) |
| 166 | #define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 17) | 166 | #define PMBUS_VIRT_RESET_POUT_HISTORY (PMBUS_VIRT_BASE + 17) |
| 167 | #define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 18) | 167 | #define PMBUS_VIRT_READ_VOUT_AVG (PMBUS_VIRT_BASE + 18) |
| 168 | #define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 19) | 168 | #define PMBUS_VIRT_READ_VOUT_MIN (PMBUS_VIRT_BASE + 19) |
| 169 | #define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 20) | 169 | #define PMBUS_VIRT_READ_VOUT_MAX (PMBUS_VIRT_BASE + 20) |
| 170 | #define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 21) | 170 | #define PMBUS_VIRT_RESET_VOUT_HISTORY (PMBUS_VIRT_BASE + 21) |
| 171 | #define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 22) | 171 | #define PMBUS_VIRT_READ_IOUT_AVG (PMBUS_VIRT_BASE + 22) |
| 172 | #define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 23) | 172 | #define PMBUS_VIRT_READ_IOUT_MIN (PMBUS_VIRT_BASE + 23) |
| 173 | #define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 24) | 173 | #define PMBUS_VIRT_READ_IOUT_MAX (PMBUS_VIRT_BASE + 24) |
| 174 | #define PMBUS_VIRT_RESET_IOUT_HISTORY (PMBUS_VIRT_BASE + 25) | ||
| 175 | #define PMBUS_VIRT_READ_TEMP2_AVG (PMBUS_VIRT_BASE + 26) | ||
| 176 | #define PMBUS_VIRT_READ_TEMP2_MIN (PMBUS_VIRT_BASE + 27) | ||
| 177 | #define PMBUS_VIRT_READ_TEMP2_MAX (PMBUS_VIRT_BASE + 28) | ||
| 178 | #define PMBUS_VIRT_RESET_TEMP2_HISTORY (PMBUS_VIRT_BASE + 29) | ||
| 174 | 179 | ||
| 175 | /* | 180 | /* |
| 176 | * CAPABILITY | 181 | * CAPABILITY |