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authorIngo Molnar <mingo@elte.hu>2009-02-20 11:40:43 -0500
committerIngo Molnar <mingo@elte.hu>2009-02-20 11:40:43 -0500
commit3b6f7b9beb553ea71a6d4d76ba82cf32eb6dadd2 (patch)
tree2cd8a8d61f350aa3b00e6b0afc998544923f183e /drivers/hwmon/lis3lv02d.h
parent9be1b56a3e718aa998772019c57c398dbb19e258 (diff)
parent07a66d7c53a538e1a9759954a82bb6c07365eff9 (diff)
Merge branch 'x86/urgent' into x86/core
Diffstat (limited to 'drivers/hwmon/lis3lv02d.h')
-rw-r--r--drivers/hwmon/lis3lv02d.h21
1 files changed, 18 insertions, 3 deletions
diff --git a/drivers/hwmon/lis3lv02d.h b/drivers/hwmon/lis3lv02d.h
index 223f1c0763bb..75972bf372ff 100644
--- a/drivers/hwmon/lis3lv02d.h
+++ b/drivers/hwmon/lis3lv02d.h
@@ -22,12 +22,15 @@
22/* 22/*
23 * The actual chip is STMicroelectronics LIS3LV02DL or LIS3LV02DQ that seems to 23 * The actual chip is STMicroelectronics LIS3LV02DL or LIS3LV02DQ that seems to
24 * be connected via SPI. There exists also several similar chips (such as LIS302DL or 24 * be connected via SPI. There exists also several similar chips (such as LIS302DL or
25 * LIS3L02DQ) but not in the HP laptops and they have slightly different registers. 25 * LIS3L02DQ) and they have slightly different registers, but we can provide a
26 * common interface for all of them.
26 * They can also be connected via I²C. 27 * They can also be connected via I²C.
27 */ 28 */
28 29
29#define LIS3LV02DL_ID 0x3A /* Also the LIS3LV02DQ */ 30/* 2-byte registers */
30#define LIS302DL_ID 0x3B /* Also the LIS202DL! */ 31#define LIS_DOUBLE_ID 0x3A /* LIS3LV02D[LQ] */
32/* 1-byte registers */
33#define LIS_SINGLE_ID 0x3B /* LIS[32]02DL and others */
31 34
32enum lis3lv02d_reg { 35enum lis3lv02d_reg {
33 WHO_AM_I = 0x0F, 36 WHO_AM_I = 0x0F,
@@ -44,10 +47,13 @@ enum lis3lv02d_reg {
44 STATUS_REG = 0x27, 47 STATUS_REG = 0x27,
45 OUTX_L = 0x28, 48 OUTX_L = 0x28,
46 OUTX_H = 0x29, 49 OUTX_H = 0x29,
50 OUTX = 0x29,
47 OUTY_L = 0x2A, 51 OUTY_L = 0x2A,
48 OUTY_H = 0x2B, 52 OUTY_H = 0x2B,
53 OUTY = 0x2B,
49 OUTZ_L = 0x2C, 54 OUTZ_L = 0x2C,
50 OUTZ_H = 0x2D, 55 OUTZ_H = 0x2D,
56 OUTZ = 0x2D,
51 FF_WU_CFG = 0x30, 57 FF_WU_CFG = 0x30,
52 FF_WU_SRC = 0x31, 58 FF_WU_SRC = 0x31,
53 FF_WU_ACK = 0x32, 59 FF_WU_ACK = 0x32,
@@ -159,6 +165,10 @@ struct acpi_lis3lv02d {
159 acpi_status (*write) (acpi_handle handle, int reg, u8 val); 165 acpi_status (*write) (acpi_handle handle, int reg, u8 val);
160 acpi_status (*read) (acpi_handle handle, int reg, u8 *ret); 166 acpi_status (*read) (acpi_handle handle, int reg, u8 *ret);
161 167
168 u8 whoami; /* 3Ah: 2-byte registries, 3Bh: 1-byte registries */
169 s16 (*read_data) (acpi_handle handle, int reg);
170 int mdps_max_val;
171
162 struct input_dev *idev; /* input device */ 172 struct input_dev *idev; /* input device */
163 struct task_struct *kthread; /* kthread for input */ 173 struct task_struct *kthread; /* kthread for input */
164 struct mutex lock; 174 struct mutex lock;
@@ -170,6 +180,11 @@ struct acpi_lis3lv02d {
170 unsigned char is_on; /* whether the device is on or off */ 180 unsigned char is_on; /* whether the device is on or off */
171 unsigned char usage; /* usage counter */ 181 unsigned char usage; /* usage counter */
172 struct axis_conversion ac; /* hw -> logical axis */ 182 struct axis_conversion ac; /* hw -> logical axis */
183
184 u32 irq; /* IRQ number */
185 struct fasync_struct *async_queue; /* queue for the misc device */
186 wait_queue_head_t misc_wait; /* Wait queue for the misc device */
187 unsigned long misc_opened; /* bit0: whether the device is open */
173}; 188};
174 189
175int lis3lv02d_init_device(struct acpi_lis3lv02d *dev); 190int lis3lv02d_init_device(struct acpi_lis3lv02d *dev);