diff options
author | Andreas Herrmann <andreas.herrmann3@amd.com> | 2010-10-28 14:31:42 -0400 |
---|---|---|
committer | Jean Delvare <khali@endymion.delvare> | 2010-10-28 14:31:42 -0400 |
commit | 628b4504cf69fbe262b41c16a4a3fd61b091d61c (patch) | |
tree | 4cdec2aa4b4934918d68bca2c0758faa989a36d2 /drivers/hwmon/k8temp.c | |
parent | 81280572ca6f54009edfa4deee563e8678784218 (diff) |
hwmon: (k8temp) Remove superfluous CPU family check
The family check in k8temp is not required because the driver is
already bound to a northbridge device only used with K8 CPUs.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'drivers/hwmon/k8temp.c')
-rw-r--r-- | drivers/hwmon/k8temp.c | 51 |
1 files changed, 22 insertions, 29 deletions
diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c index 39ead2a4d3c5..418496f13020 100644 --- a/drivers/hwmon/k8temp.c +++ b/drivers/hwmon/k8temp.c | |||
@@ -191,38 +191,31 @@ static int __devinit k8temp_probe(struct pci_dev *pdev, | |||
191 | model = boot_cpu_data.x86_model; | 191 | model = boot_cpu_data.x86_model; |
192 | stepping = boot_cpu_data.x86_mask; | 192 | stepping = boot_cpu_data.x86_mask; |
193 | 193 | ||
194 | switch (boot_cpu_data.x86) { | 194 | /* feature available since SH-C0, exclude older revisions */ |
195 | case 0xf: | 195 | if (((model == 4) && (stepping == 0)) || |
196 | /* feature available since SH-C0, exclude older revisions */ | 196 | ((model == 5) && (stepping <= 1))) { |
197 | if (((model == 4) && (stepping == 0)) || | 197 | err = -ENODEV; |
198 | ((model == 5) && (stepping <= 1))) { | 198 | goto exit_free; |
199 | err = -ENODEV; | 199 | } |
200 | goto exit_free; | ||
201 | } | ||
202 | |||
203 | /* | ||
204 | * AMD NPT family 0fh, i.e. RevF and RevG: | ||
205 | * meaning of SEL_CORE bit is inverted | ||
206 | */ | ||
207 | if (model >= 0x40) { | ||
208 | data->swap_core_select = 1; | ||
209 | dev_warn(&pdev->dev, "Temperature readouts might be " | ||
210 | "wrong - check erratum #141\n"); | ||
211 | } | ||
212 | |||
213 | if (is_rev_g_desktop(model)) { | ||
214 | /* | ||
215 | * RevG desktop CPUs (i.e. no socket S1G1 or | ||
216 | * ASB1 parts) need additional offset, | ||
217 | * otherwise reported temperature is below | ||
218 | * ambient temperature | ||
219 | */ | ||
220 | data->temp_offset = 21000; | ||
221 | } | ||
222 | 200 | ||
223 | break; | 201 | /* |
202 | * AMD NPT family 0fh, i.e. RevF and RevG: | ||
203 | * meaning of SEL_CORE bit is inverted | ||
204 | */ | ||
205 | if (model >= 0x40) { | ||
206 | data->swap_core_select = 1; | ||
207 | dev_warn(&pdev->dev, "Temperature readouts might be wrong - " | ||
208 | "check erratum #141\n"); | ||
224 | } | 209 | } |
225 | 210 | ||
211 | /* | ||
212 | * RevG desktop CPUs (i.e. no socket S1G1 or ASB1 parts) need | ||
213 | * additional offset, otherwise reported temperature is below | ||
214 | * ambient temperature | ||
215 | */ | ||
216 | if (is_rev_g_desktop(model)) | ||
217 | data->temp_offset = 21000; | ||
218 | |||
226 | pci_read_config_byte(pdev, REG_TEMP, &scfg); | 219 | pci_read_config_byte(pdev, REG_TEMP, &scfg); |
227 | scfg &= ~(SEL_PLACE | SEL_CORE); /* Select sensor 0, core0 */ | 220 | scfg &= ~(SEL_PLACE | SEL_CORE); /* Select sensor 0, core0 */ |
228 | pci_write_config_byte(pdev, REG_TEMP, scfg); | 221 | pci_write_config_byte(pdev, REG_TEMP, scfg); |