diff options
author | Frank Myhr <fmyhr@fhmtech.com> | 2008-08-06 16:41:06 -0400 |
---|---|---|
committer | Jean Delvare <khali@mahadeva.delvare> | 2008-08-06 16:41:06 -0400 |
commit | 116d0486bdefc11f71e567cadf0c47f788b4dd06 (patch) | |
tree | 2c403aedb7e476942b28fb5dbb88cd5266f4d178 /drivers/hwmon/hwmon-vid.c | |
parent | 15872212e876de9ae404108e4ad231a645b55b54 (diff) |
hwmon: (hwmon-vid) Add 6-bit vid codes for AMD NPT 0Fh cpus
AMD NPT 0Fh cpus use 6 bit VID codes. Successive codes with msb 0
describe 25mV decrements, while those with msb 1 describe 12.5mV
decrements. Existing hwmon-vid.c is correct only for codes with msb 0;
add support for the codes with msb 1.
Ref:
p 309, Table 71
AMD Publication 32559, BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf
Signed-off-by: Frank Myhr <fmyhr@fhmtech.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'drivers/hwmon/hwmon-vid.c')
-rw-r--r-- | drivers/hwmon/hwmon-vid.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c index ed78a72e7261..7b0a32c4dcfb 100644 --- a/drivers/hwmon/hwmon-vid.c +++ b/drivers/hwmon/hwmon-vid.c | |||
@@ -37,18 +37,14 @@ | |||
37 | * For VRD 10.0 and up, "VRD x.y Design Guide", | 37 | * For VRD 10.0 and up, "VRD x.y Design Guide", |
38 | * available at http://developer.intel.com/. | 38 | * available at http://developer.intel.com/. |
39 | * | 39 | * |
40 | * AMD NPT 0Fh (Athlon64 & Opteron), AMD Publication 32559, | ||
41 | * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf | ||
42 | * Table 71. VID Code Voltages | ||
40 | * AMD Opteron processors don't follow the Intel specifications. | 43 | * AMD Opteron processors don't follow the Intel specifications. |
41 | * I'm going to "make up" 2.4 as the spec number for the Opterons. | 44 | * I'm going to "make up" 2.4 as the spec number for the Opterons. |
42 | * No good reason just a mnemonic for the 24x Opteron processor | 45 | * No good reason just a mnemonic for the 24x Opteron processor |
43 | * series. | 46 | * series. |
44 | * | 47 | * |
45 | * Opteron VID encoding is: | ||
46 | * 00000 = 1.550 V | ||
47 | * 00001 = 1.525 V | ||
48 | * . . . . | ||
49 | * 11110 = 0.800 V | ||
50 | * 11111 = 0.000 V (off) | ||
51 | * | ||
52 | * The 17 specification is in fact Intel Mobile Voltage Positioning - | 48 | * The 17 specification is in fact Intel Mobile Voltage Positioning - |
53 | * (IMVP-II). You can find more information in the datasheet of Max1718 | 49 | * (IMVP-II). You can find more information in the datasheet of Max1718 |
54 | * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452 | 50 | * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452 |
@@ -98,9 +94,11 @@ int vid_from_reg(int val, u8 vrm) | |||
98 | if (val < 0x02 || val > 0xb2) | 94 | if (val < 0x02 || val > 0xb2) |
99 | return 0; | 95 | return 0; |
100 | return((1600000 - (val - 2) * 6250 + 500) / 1000); | 96 | return((1600000 - (val - 2) * 6250 + 500) / 1000); |
101 | case 24: /* Opteron processor */ | 97 | |
102 | val &= 0x1f; | 98 | case 24: /* AMD NPT 0Fh (Athlon64 & Opteron) */ |
103 | return(val == 0x1f ? 0 : 1550 - val * 25); | 99 | val &= 0x3f; |
100 | return (val < 32) ? 1550 - 25 * val | ||
101 | : 775 - (25 * (val - 31)) / 2; | ||
104 | 102 | ||
105 | case 91: /* VRM 9.1 */ | 103 | case 91: /* VRM 9.1 */ |
106 | case 90: /* VRM 9.0 */ | 104 | case 90: /* VRM 9.0 */ |