diff options
author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2009-11-02 02:52:30 -0500 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2009-11-05 17:03:28 -0500 |
commit | d8a2d0e00c0d5a0d55e14b884bff034205015e51 (patch) | |
tree | 6a997424c636e447f79a09ab334b7744592ffec5 /drivers/gpu | |
parent | 4bfe6b6876a036d26a960320f1ab0bbd752c19bf (diff) |
drm/i915: HDMI hardware workaround for Ironlake
This brings some hardware workaround for HDMI port on PCH (Ibex Peak),
which fixes unstable issues like during rotation.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 663ab6de0b58..c33451aec1bd 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -77,14 +77,32 @@ static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) | |||
77 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 77 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; |
78 | u32 temp; | 78 | u32 temp; |
79 | 79 | ||
80 | if (mode != DRM_MODE_DPMS_ON) { | 80 | temp = I915_READ(hdmi_priv->sdvox_reg); |
81 | temp = I915_READ(hdmi_priv->sdvox_reg); | 81 | |
82 | /* HW workaround, need to toggle enable bit off and on for 12bpc, but | ||
83 | * we do this anyway which shows more stable in testing. | ||
84 | */ | ||
85 | if (IS_IGDNG(dev)) { | ||
82 | I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE); | 86 | I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE); |
87 | POSTING_READ(hdmi_priv->sdvox_reg); | ||
88 | } | ||
89 | |||
90 | if (mode != DRM_MODE_DPMS_ON) { | ||
91 | temp &= ~SDVO_ENABLE; | ||
83 | } else { | 92 | } else { |
84 | temp = I915_READ(hdmi_priv->sdvox_reg); | 93 | temp |= SDVO_ENABLE; |
85 | I915_WRITE(hdmi_priv->sdvox_reg, temp | SDVO_ENABLE); | ||
86 | } | 94 | } |
95 | |||
96 | I915_WRITE(hdmi_priv->sdvox_reg, temp); | ||
87 | POSTING_READ(hdmi_priv->sdvox_reg); | 97 | POSTING_READ(hdmi_priv->sdvox_reg); |
98 | |||
99 | /* HW workaround, need to write this twice for issue that may result | ||
100 | * in first write getting masked. | ||
101 | */ | ||
102 | if (IS_IGDNG(dev)) { | ||
103 | I915_WRITE(hdmi_priv->sdvox_reg, temp); | ||
104 | POSTING_READ(hdmi_priv->sdvox_reg); | ||
105 | } | ||
88 | } | 106 | } |
89 | 107 | ||
90 | static void intel_hdmi_save(struct drm_connector *connector) | 108 | static void intel_hdmi_save(struct drm_connector *connector) |