diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-20 06:40:50 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-21 06:20:54 -0400 |
commit | 53640e1d07fb7dd5d14300dd94f4718eca33348e (patch) | |
tree | 1456d21919ada2f82ab0aa6dea9b72d86e9df100 /drivers/gpu | |
parent | ab6f8e325083f138ce5da8417baf48887d62da3c (diff) |
drm/i915: Track gpu fence usage
Track if the gpu requires the fence for the execution of a batch buffer
and so only wait upon the retirement of the object's last rendering
seqno if the fence is in use by the GPU.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 11 |
2 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 790ffec135df..6e22be4f3585 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -128,6 +128,7 @@ struct drm_i915_master_private { | |||
128 | struct drm_i915_fence_reg { | 128 | struct drm_i915_fence_reg { |
129 | struct drm_gem_object *obj; | 129 | struct drm_gem_object *obj; |
130 | struct list_head lru_list; | 130 | struct list_head lru_list; |
131 | bool gpu; | ||
131 | }; | 132 | }; |
132 | 133 | ||
133 | struct sdvo_device_mapping { | 134 | struct sdvo_device_mapping { |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index b242530ffcbd..a5d5751bad30 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -2461,7 +2461,9 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj, | |||
2461 | bool interruptible) | 2461 | bool interruptible) |
2462 | { | 2462 | { |
2463 | struct drm_device *dev = obj->dev; | 2463 | struct drm_device *dev = obj->dev; |
2464 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
2464 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); | 2465 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2466 | struct drm_i915_fence_reg *reg; | ||
2465 | 2467 | ||
2466 | if (obj_priv->fence_reg == I915_FENCE_REG_NONE) | 2468 | if (obj_priv->fence_reg == I915_FENCE_REG_NONE) |
2467 | return 0; | 2469 | return 0; |
@@ -2476,7 +2478,8 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj, | |||
2476 | * therefore we must wait for any outstanding access to complete | 2478 | * therefore we must wait for any outstanding access to complete |
2477 | * before clearing the fence. | 2479 | * before clearing the fence. |
2478 | */ | 2480 | */ |
2479 | if (INTEL_INFO(dev)->gen < 4) { | 2481 | reg = &dev_priv->fence_regs[obj_priv->fence_reg]; |
2482 | if (reg->gpu) { | ||
2480 | int ret; | 2483 | int ret; |
2481 | 2484 | ||
2482 | ret = i915_gem_object_flush_gpu_write_domain(obj, true); | 2485 | ret = i915_gem_object_flush_gpu_write_domain(obj, true); |
@@ -2486,6 +2489,8 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj, | |||
2486 | ret = i915_gem_object_wait_rendering(obj, interruptible); | 2489 | ret = i915_gem_object_wait_rendering(obj, interruptible); |
2487 | if (ret) | 2490 | if (ret) |
2488 | return ret; | 2491 | return ret; |
2492 | |||
2493 | reg->gpu = false; | ||
2489 | } | 2494 | } |
2490 | 2495 | ||
2491 | i915_gem_object_flush_gtt_write_domain(obj); | 2496 | i915_gem_object_flush_gtt_write_domain(obj); |
@@ -3180,11 +3185,13 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
3180 | * properly handle blits to/from tiled surfaces. | 3185 | * properly handle blits to/from tiled surfaces. |
3181 | */ | 3186 | */ |
3182 | if (need_fence) { | 3187 | if (need_fence) { |
3183 | ret = i915_gem_object_get_fence_reg(obj, false); | 3188 | ret = i915_gem_object_get_fence_reg(obj, true); |
3184 | if (ret != 0) { | 3189 | if (ret != 0) { |
3185 | i915_gem_object_unpin(obj); | 3190 | i915_gem_object_unpin(obj); |
3186 | return ret; | 3191 | return ret; |
3187 | } | 3192 | } |
3193 | |||
3194 | dev_priv->fence_regs[obj_priv->fence_reg].gpu = true; | ||
3188 | } | 3195 | } |
3189 | 3196 | ||
3190 | entry->offset = obj_priv->gtt_offset; | 3197 | entry->offset = obj_priv->gtt_offset; |