diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-09-02 15:52:11 -0400 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2011-10-20 18:26:42 -0400 |
commit | 4c609cb890b13ef58e0c0cdd238993484e1b9b83 (patch) | |
tree | 30c4be936612d43c439339e1375f0d70dd04a392 /drivers/gpu | |
parent | c4f9c4c2b3f1831e932e04db992cf6fe92c2a95a (diff) |
drm/i915: PLL macro cleanup and pipe assertion check
Add a macro for accessing the two pipe PLLs and add a check to make sure
we don't access a non-existent one in the enable/disable functions.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 6 |
2 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d8bf9cf348ec..6cad6b1e3355 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -2967,15 +2967,15 @@ | |||
2967 | 2967 | ||
2968 | #define _PCH_DPLL_A 0xc6014 | 2968 | #define _PCH_DPLL_A 0xc6014 |
2969 | #define _PCH_DPLL_B 0xc6018 | 2969 | #define _PCH_DPLL_B 0xc6018 |
2970 | #define PCH_DPLL(pipe) _PIPE(pipe, _PCH_DPLL_A, _PCH_DPLL_B) | 2970 | #define PCH_DPLL(pipe) (pipe == 0 ? _PCH_DPLL_A : _PCH_DPLL_B) |
2971 | 2971 | ||
2972 | #define _PCH_FPA0 0xc6040 | 2972 | #define _PCH_FPA0 0xc6040 |
2973 | #define FP_CB_TUNE (0x3<<22) | 2973 | #define FP_CB_TUNE (0x3<<22) |
2974 | #define _PCH_FPA1 0xc6044 | 2974 | #define _PCH_FPA1 0xc6044 |
2975 | #define _PCH_FPB0 0xc6048 | 2975 | #define _PCH_FPB0 0xc6048 |
2976 | #define _PCH_FPB1 0xc604c | 2976 | #define _PCH_FPB1 0xc604c |
2977 | #define PCH_FP0(pipe) _PIPE(pipe, _PCH_FPA0, _PCH_FPB0) | 2977 | #define PCH_FP0(pipe) (pipe == 0 ? _PCH_FPA0 : _PCH_FPB0) |
2978 | #define PCH_FP1(pipe) _PIPE(pipe, _PCH_FPA1, _PCH_FPB1) | 2978 | #define PCH_FP1(pipe) (pipe == 0 ? _PCH_FPA1 : _PCH_FPB1) |
2979 | 2979 | ||
2980 | #define PCH_DPLL_TEST 0xc606c | 2980 | #define PCH_DPLL_TEST 0xc606c |
2981 | 2981 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2e28c687010c..dade95ca0d86 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1172,6 +1172,9 @@ static void intel_enable_pch_pll(struct drm_i915_private *dev_priv, | |||
1172 | int reg; | 1172 | int reg; |
1173 | u32 val; | 1173 | u32 val; |
1174 | 1174 | ||
1175 | if (pipe > 1) | ||
1176 | return; | ||
1177 | |||
1175 | /* PCH only available on ILK+ */ | 1178 | /* PCH only available on ILK+ */ |
1176 | BUG_ON(dev_priv->info->gen < 5); | 1179 | BUG_ON(dev_priv->info->gen < 5); |
1177 | 1180 | ||
@@ -1192,6 +1195,9 @@ static void intel_disable_pch_pll(struct drm_i915_private *dev_priv, | |||
1192 | int reg; | 1195 | int reg; |
1193 | u32 val; | 1196 | u32 val; |
1194 | 1197 | ||
1198 | if (pipe > 1) | ||
1199 | return; | ||
1200 | |||
1195 | /* PCH only available on ILK+ */ | 1201 | /* PCH only available on ILK+ */ |
1196 | BUG_ON(dev_priv->info->gen < 5); | 1202 | BUG_ON(dev_priv->info->gen < 5); |
1197 | 1203 | ||