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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-03-11 16:19:14 -0500
committerDave Airlie <airlied@redhat.com>2010-03-14 21:27:03 -0400
commit0a10c85129c2d53cfd6db81677628e2fe58b5928 (patch)
tree6dd3dce247ad005d0ebb41b321cb7f0586e4bee0 /drivers/gpu
parent1fc59eda33e55f8787901e3501d695bf5ecec48b (diff)
drm/radeon: create radeon_asic.c
And move asic init plus a few related functions from radeon_device.c to it. This file will hold all the asic structures in the future, but atm they're still stuck in radeon_asic.h. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/Makefile2
-rw-r--r--drivers/gpu/drm/radeon/radeon.h6
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c236
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c199
4 files changed, 243 insertions, 200 deletions
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index ed38262d9985..3c91312dea9a 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -50,7 +50,7 @@ $(obj)/r600_cs.o: $(obj)/r600_reg_safe.h
50radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \ 50radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \
51 radeon_irq.o r300_cmdbuf.o r600_cp.o 51 radeon_irq.o r300_cmdbuf.o r600_cp.o
52# add KMS driver 52# add KMS driver
53radeon-y += radeon_device.o radeon_kms.o \ 53radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
54 radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \ 54 radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \
55 atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \ 55 atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
56 radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \ 56 radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index b54d4f36c4da..67f3c576ab7d 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -863,6 +863,12 @@ union radeon_asic_config {
863 struct rv770_asic rv770; 863 struct rv770_asic rv770;
864}; 864};
865 865
866/*
867 * asic initizalization from radeon_asic.c
868 */
869void radeon_agp_disable(struct radeon_device *rdev);
870int radeon_asic_init(struct radeon_device *rdev);
871
866 872
867/* 873/*
868 * IOCTL. 874 * IOCTL.
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
new file mode 100644
index 000000000000..9dffaedccc6d
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -0,0 +1,236 @@
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28
29#include <linux/console.h>
30#include <drm/drmP.h>
31#include <drm/drm_crtc_helper.h>
32#include <drm/radeon_drm.h>
33#include <linux/vgaarb.h>
34#include <linux/vga_switcheroo.h>
35#include "radeon_reg.h"
36#include "radeon.h"
37#include "radeon_asic.h"
38#include "atom.h"
39
40/*
41 * Registers accessors functions.
42 */
43static uint32_t radeon_invalid_rreg(struct radeon_device *rdev, uint32_t reg)
44{
45 DRM_ERROR("Invalid callback to read register 0x%04X\n", reg);
46 BUG_ON(1);
47 return 0;
48}
49
50static void radeon_invalid_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
51{
52 DRM_ERROR("Invalid callback to write register 0x%04X with 0x%08X\n",
53 reg, v);
54 BUG_ON(1);
55}
56
57static void radeon_register_accessor_init(struct radeon_device *rdev)
58{
59 rdev->mc_rreg = &radeon_invalid_rreg;
60 rdev->mc_wreg = &radeon_invalid_wreg;
61 rdev->pll_rreg = &radeon_invalid_rreg;
62 rdev->pll_wreg = &radeon_invalid_wreg;
63 rdev->pciep_rreg = &radeon_invalid_rreg;
64 rdev->pciep_wreg = &radeon_invalid_wreg;
65
66 /* Don't change order as we are overridding accessor. */
67 if (rdev->family < CHIP_RV515) {
68 rdev->pcie_reg_mask = 0xff;
69 } else {
70 rdev->pcie_reg_mask = 0x7ff;
71 }
72 /* FIXME: not sure here */
73 if (rdev->family <= CHIP_R580) {
74 rdev->pll_rreg = &r100_pll_rreg;
75 rdev->pll_wreg = &r100_pll_wreg;
76 }
77 if (rdev->family >= CHIP_R420) {
78 rdev->mc_rreg = &r420_mc_rreg;
79 rdev->mc_wreg = &r420_mc_wreg;
80 }
81 if (rdev->family >= CHIP_RV515) {
82 rdev->mc_rreg = &rv515_mc_rreg;
83 rdev->mc_wreg = &rv515_mc_wreg;
84 }
85 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) {
86 rdev->mc_rreg = &rs400_mc_rreg;
87 rdev->mc_wreg = &rs400_mc_wreg;
88 }
89 if (rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
90 rdev->mc_rreg = &rs690_mc_rreg;
91 rdev->mc_wreg = &rs690_mc_wreg;
92 }
93 if (rdev->family == CHIP_RS600) {
94 rdev->mc_rreg = &rs600_mc_rreg;
95 rdev->mc_wreg = &rs600_mc_wreg;
96 }
97 if ((rdev->family >= CHIP_R600) && (rdev->family <= CHIP_RV740)) {
98 rdev->pciep_rreg = &r600_pciep_rreg;
99 rdev->pciep_wreg = &r600_pciep_wreg;
100 }
101}
102
103
104/* helper to disable agp */
105void radeon_agp_disable(struct radeon_device *rdev)
106{
107 rdev->flags &= ~RADEON_IS_AGP;
108 if (rdev->family >= CHIP_R600) {
109 DRM_INFO("Forcing AGP to PCIE mode\n");
110 rdev->flags |= RADEON_IS_PCIE;
111 } else if (rdev->family >= CHIP_RV515 ||
112 rdev->family == CHIP_RV380 ||
113 rdev->family == CHIP_RV410 ||
114 rdev->family == CHIP_R423) {
115 DRM_INFO("Forcing AGP to PCIE mode\n");
116 rdev->flags |= RADEON_IS_PCIE;
117 rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
118 rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
119 } else {
120 DRM_INFO("Forcing AGP to PCI mode\n");
121 rdev->flags |= RADEON_IS_PCI;
122 rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
123 rdev->asic->gart_set_page = &r100_pci_gart_set_page;
124 }
125 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
126}
127
128/*
129 * ASIC
130 */
131int radeon_asic_init(struct radeon_device *rdev)
132{
133 radeon_register_accessor_init(rdev);
134 switch (rdev->family) {
135 case CHIP_R100:
136 case CHIP_RV100:
137 case CHIP_RS100:
138 case CHIP_RV200:
139 case CHIP_RS200:
140 rdev->asic = &r100_asic;
141 break;
142 case CHIP_R200:
143 case CHIP_RV250:
144 case CHIP_RS300:
145 case CHIP_RV280:
146 rdev->asic = &r200_asic;
147 break;
148 case CHIP_R300:
149 case CHIP_R350:
150 case CHIP_RV350:
151 case CHIP_RV380:
152 if (rdev->flags & RADEON_IS_PCIE)
153 rdev->asic = &r300_asic_pcie;
154 else
155 rdev->asic = &r300_asic;
156 break;
157 case CHIP_R420:
158 case CHIP_R423:
159 case CHIP_RV410:
160 rdev->asic = &r420_asic;
161 break;
162 case CHIP_RS400:
163 case CHIP_RS480:
164 rdev->asic = &rs400_asic;
165 break;
166 case CHIP_RS600:
167 rdev->asic = &rs600_asic;
168 break;
169 case CHIP_RS690:
170 case CHIP_RS740:
171 rdev->asic = &rs690_asic;
172 break;
173 case CHIP_RV515:
174 rdev->asic = &rv515_asic;
175 break;
176 case CHIP_R520:
177 case CHIP_RV530:
178 case CHIP_RV560:
179 case CHIP_RV570:
180 case CHIP_R580:
181 rdev->asic = &r520_asic;
182 break;
183 case CHIP_R600:
184 case CHIP_RV610:
185 case CHIP_RV630:
186 case CHIP_RV620:
187 case CHIP_RV635:
188 case CHIP_RV670:
189 case CHIP_RS780:
190 case CHIP_RS880:
191 rdev->asic = &r600_asic;
192 break;
193 case CHIP_RV770:
194 case CHIP_RV730:
195 case CHIP_RV710:
196 case CHIP_RV740:
197 rdev->asic = &rv770_asic;
198 break;
199 case CHIP_CEDAR:
200 case CHIP_REDWOOD:
201 case CHIP_JUNIPER:
202 case CHIP_CYPRESS:
203 case CHIP_HEMLOCK:
204 rdev->asic = &evergreen_asic;
205 break;
206 default:
207 /* FIXME: not supported yet */
208 return -EINVAL;
209 }
210
211 if (rdev->flags & RADEON_IS_IGP) {
212 rdev->asic->get_memory_clock = NULL;
213 rdev->asic->set_memory_clock = NULL;
214 }
215
216 return 0;
217}
218
219/*
220 * Wrapper around modesetting bits. Move to radeon_clocks.c?
221 */
222int radeon_clocks_init(struct radeon_device *rdev)
223{
224 int r;
225
226 r = radeon_static_clocks_init(rdev->ddev);
227 if (r) {
228 return r;
229 }
230 DRM_INFO("Clocks initialized !\n");
231 return 0;
232}
233
234void radeon_clocks_fini(struct radeon_device *rdev)
235{
236}
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index e28e4ed5f720..581b75ad6ce7 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -33,7 +33,6 @@
33#include <linux/vga_switcheroo.h> 33#include <linux/vga_switcheroo.h>
34#include "radeon_reg.h" 34#include "radeon_reg.h"
35#include "radeon.h" 35#include "radeon.h"
36#include "radeon_asic.h"
37#include "atom.h" 36#include "atom.h"
38 37
39/* 38/*
@@ -288,181 +287,6 @@ void radeon_dummy_page_fini(struct radeon_device *rdev)
288} 287}
289 288
290 289
291/*
292 * Registers accessors functions.
293 */
294uint32_t radeon_invalid_rreg(struct radeon_device *rdev, uint32_t reg)
295{
296 DRM_ERROR("Invalid callback to read register 0x%04X\n", reg);
297 BUG_ON(1);
298 return 0;
299}
300
301void radeon_invalid_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
302{
303 DRM_ERROR("Invalid callback to write register 0x%04X with 0x%08X\n",
304 reg, v);
305 BUG_ON(1);
306}
307
308void radeon_register_accessor_init(struct radeon_device *rdev)
309{
310 rdev->mc_rreg = &radeon_invalid_rreg;
311 rdev->mc_wreg = &radeon_invalid_wreg;
312 rdev->pll_rreg = &radeon_invalid_rreg;
313 rdev->pll_wreg = &radeon_invalid_wreg;
314 rdev->pciep_rreg = &radeon_invalid_rreg;
315 rdev->pciep_wreg = &radeon_invalid_wreg;
316
317 /* Don't change order as we are overridding accessor. */
318 if (rdev->family < CHIP_RV515) {
319 rdev->pcie_reg_mask = 0xff;
320 } else {
321 rdev->pcie_reg_mask = 0x7ff;
322 }
323 /* FIXME: not sure here */
324 if (rdev->family <= CHIP_R580) {
325 rdev->pll_rreg = &r100_pll_rreg;
326 rdev->pll_wreg = &r100_pll_wreg;
327 }
328 if (rdev->family >= CHIP_R420) {
329 rdev->mc_rreg = &r420_mc_rreg;
330 rdev->mc_wreg = &r420_mc_wreg;
331 }
332 if (rdev->family >= CHIP_RV515) {
333 rdev->mc_rreg = &rv515_mc_rreg;
334 rdev->mc_wreg = &rv515_mc_wreg;
335 }
336 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) {
337 rdev->mc_rreg = &rs400_mc_rreg;
338 rdev->mc_wreg = &rs400_mc_wreg;
339 }
340 if (rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
341 rdev->mc_rreg = &rs690_mc_rreg;
342 rdev->mc_wreg = &rs690_mc_wreg;
343 }
344 if (rdev->family == CHIP_RS600) {
345 rdev->mc_rreg = &rs600_mc_rreg;
346 rdev->mc_wreg = &rs600_mc_wreg;
347 }
348 if ((rdev->family >= CHIP_R600) && (rdev->family <= CHIP_RV740)) {
349 rdev->pciep_rreg = &r600_pciep_rreg;
350 rdev->pciep_wreg = &r600_pciep_wreg;
351 }
352}
353
354
355/*
356 * ASIC
357 */
358int radeon_asic_init(struct radeon_device *rdev)
359{
360 radeon_register_accessor_init(rdev);
361 switch (rdev->family) {
362 case CHIP_R100:
363 case CHIP_RV100:
364 case CHIP_RS100:
365 case CHIP_RV200:
366 case CHIP_RS200:
367 rdev->asic = &r100_asic;
368 break;
369 case CHIP_R200:
370 case CHIP_RV250:
371 case CHIP_RS300:
372 case CHIP_RV280:
373 rdev->asic = &r200_asic;
374 break;
375 case CHIP_R300:
376 case CHIP_R350:
377 case CHIP_RV350:
378 case CHIP_RV380:
379 if (rdev->flags & RADEON_IS_PCIE)
380 rdev->asic = &r300_asic_pcie;
381 else
382 rdev->asic = &r300_asic;
383 break;
384 case CHIP_R420:
385 case CHIP_R423:
386 case CHIP_RV410:
387 rdev->asic = &r420_asic;
388 break;
389 case CHIP_RS400:
390 case CHIP_RS480:
391 rdev->asic = &rs400_asic;
392 break;
393 case CHIP_RS600:
394 rdev->asic = &rs600_asic;
395 break;
396 case CHIP_RS690:
397 case CHIP_RS740:
398 rdev->asic = &rs690_asic;
399 break;
400 case CHIP_RV515:
401 rdev->asic = &rv515_asic;
402 break;
403 case CHIP_R520:
404 case CHIP_RV530:
405 case CHIP_RV560:
406 case CHIP_RV570:
407 case CHIP_R580:
408 rdev->asic = &r520_asic;
409 break;
410 case CHIP_R600:
411 case CHIP_RV610:
412 case CHIP_RV630:
413 case CHIP_RV620:
414 case CHIP_RV635:
415 case CHIP_RV670:
416 case CHIP_RS780:
417 case CHIP_RS880:
418 rdev->asic = &r600_asic;
419 break;
420 case CHIP_RV770:
421 case CHIP_RV730:
422 case CHIP_RV710:
423 case CHIP_RV740:
424 rdev->asic = &rv770_asic;
425 break;
426 case CHIP_CEDAR:
427 case CHIP_REDWOOD:
428 case CHIP_JUNIPER:
429 case CHIP_CYPRESS:
430 case CHIP_HEMLOCK:
431 rdev->asic = &evergreen_asic;
432 break;
433 default:
434 /* FIXME: not supported yet */
435 return -EINVAL;
436 }
437
438 if (rdev->flags & RADEON_IS_IGP) {
439 rdev->asic->get_memory_clock = NULL;
440 rdev->asic->set_memory_clock = NULL;
441 }
442
443 return 0;
444}
445
446
447/*
448 * Wrapper around modesetting bits.
449 */
450int radeon_clocks_init(struct radeon_device *rdev)
451{
452 int r;
453
454 r = radeon_static_clocks_init(rdev->ddev);
455 if (r) {
456 return r;
457 }
458 DRM_INFO("Clocks initialized !\n");
459 return 0;
460}
461
462void radeon_clocks_fini(struct radeon_device *rdev)
463{
464}
465
466/* ATOM accessor methods */ 290/* ATOM accessor methods */
467static uint32_t cail_pll_read(struct card_info *info, uint32_t reg) 291static uint32_t cail_pll_read(struct card_info *info, uint32_t reg)
468{ 292{
@@ -567,29 +391,6 @@ static unsigned int radeon_vga_set_decode(void *cookie, bool state)
567 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 391 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
568} 392}
569 393
570void radeon_agp_disable(struct radeon_device *rdev)
571{
572 rdev->flags &= ~RADEON_IS_AGP;
573 if (rdev->family >= CHIP_R600) {
574 DRM_INFO("Forcing AGP to PCIE mode\n");
575 rdev->flags |= RADEON_IS_PCIE;
576 } else if (rdev->family >= CHIP_RV515 ||
577 rdev->family == CHIP_RV380 ||
578 rdev->family == CHIP_RV410 ||
579 rdev->family == CHIP_R423) {
580 DRM_INFO("Forcing AGP to PCIE mode\n");
581 rdev->flags |= RADEON_IS_PCIE;
582 rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
583 rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
584 } else {
585 DRM_INFO("Forcing AGP to PCI mode\n");
586 rdev->flags |= RADEON_IS_PCI;
587 rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
588 rdev->asic->gart_set_page = &r100_pci_gart_set_page;
589 }
590 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
591}
592
593void radeon_check_arguments(struct radeon_device *rdev) 394void radeon_check_arguments(struct radeon_device *rdev)
594{ 395{
595 /* vramlimit must be a power of two */ 396 /* vramlimit must be a power of two */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-02 19:34:33 -0500