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authorDave Airlie <airlied@redhat.com>2009-07-21 06:39:30 -0400
committerDave Airlie <airlied@redhat.com>2009-07-29 01:53:25 -0400
commit7a50f01a4ab89d5c05eb2cf62e206ac0bfc61d2c (patch)
treea73ed14d4f0bc51e52fa68563f9a26117ea6fed6 /drivers/gpu
parent664f86590295217b2319edf88830e87b800f6c4a (diff)
drm/radeon/kms: vram sizing on certain r100 chips needs workaround.
If an rn50/r100/m6/m7 GPU has < 64MB RAM, i.e. 8/16/32, the aperture used to calculate the MC_FB_LOCATION needs to be worked out from the CONFIG_APER_SIZE register, and not the actual vram size. TTM VRAM size was also being initialised wrong, use actual vram size to initialise it. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/r100.c34
-rw-r--r--drivers/gpu/drm/radeon/r520.c4
-rw-r--r--drivers/gpu/drm/radeon/r600.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon.h5
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c20
-rw-r--r--drivers/gpu/drm/radeon/radeon_gem.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c4
-rw-r--r--drivers/gpu/drm/radeon/rs400.c4
-rw-r--r--drivers/gpu/drm/radeon/rs600.c2
-rw-r--r--drivers/gpu/drm/radeon/rs690.c7
-rw-r--r--drivers/gpu/drm/radeon/rv515.c7
-rw-r--r--drivers/gpu/drm/radeon/rv770.c2
12 files changed, 56 insertions, 42 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 0e00fef0b84f..05a44896dffb 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -173,8 +173,12 @@ void r100_mc_setup(struct radeon_device *rdev)
173 DRM_ERROR("Failed to register debugfs file for R100 MC !\n"); 173 DRM_ERROR("Failed to register debugfs file for R100 MC !\n");
174 } 174 }
175 /* Write VRAM size in case we are limiting it */ 175 /* Write VRAM size in case we are limiting it */
176 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 176 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
177 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 177 /* Novell bug 204882 for RN50/M6/M7 with 8/16/32MB VRAM,
178 * if the aperture is 64MB but we have 32MB VRAM
179 * we report only 32MB VRAM but we have to set MC_FB_LOCATION
180 * to 64MB, otherwise the gpu accidentially dies */
181 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
178 tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16); 182 tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16);
179 tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16); 183 tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16);
180 WREG32(RADEON_MC_FB_LOCATION, tmp); 184 WREG32(RADEON_MC_FB_LOCATION, tmp);
@@ -1447,25 +1451,28 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
1447 uint32_t tom; 1451 uint32_t tom;
1448 /* read NB_TOM to get the amount of ram stolen for the GPU */ 1452 /* read NB_TOM to get the amount of ram stolen for the GPU */
1449 tom = RREG32(RADEON_NB_TOM); 1453 tom = RREG32(RADEON_NB_TOM);
1450 rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16); 1454 rdev->mc.real_vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);
1451 /* for IGPs we need to keep VRAM where it was put by the BIOS */ 1455 /* for IGPs we need to keep VRAM where it was put by the BIOS */
1452 rdev->mc.vram_location = (tom & 0xffff) << 16; 1456 rdev->mc.vram_location = (tom & 0xffff) << 16;
1453 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 1457 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
1458 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
1454 } else { 1459 } else {
1455 rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE); 1460 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
1456 /* Some production boards of m6 will report 0 1461 /* Some production boards of m6 will report 0
1457 * if it's 8 MB 1462 * if it's 8 MB
1458 */ 1463 */
1459 if (rdev->mc.vram_size == 0) { 1464 if (rdev->mc.real_vram_size == 0) {
1460 rdev->mc.vram_size = 8192 * 1024; 1465 rdev->mc.real_vram_size = 8192 * 1024;
1461 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 1466 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
1462 } 1467 }
1463 /* let driver place VRAM */ 1468 /* let driver place VRAM */
1464 rdev->mc.vram_location = 0xFFFFFFFFUL; 1469 rdev->mc.vram_location = 0xFFFFFFFFUL;
1465 /* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM - 1470 /* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM -
1466 * Novell bug 204882 + along with lots of ubuntu ones */ 1471 * Novell bug 204882 + along with lots of ubuntu ones */
1467 if (config_aper_size > rdev->mc.vram_size) 1472 if (config_aper_size > rdev->mc.real_vram_size)
1468 rdev->mc.vram_size = config_aper_size; 1473 rdev->mc.mc_vram_size = config_aper_size;
1474 else
1475 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
1469 } 1476 }
1470 1477
1471 /* work out accessible VRAM */ 1478 /* work out accessible VRAM */
@@ -1477,8 +1484,11 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
1477 if (accessible > rdev->mc.aper_size) 1484 if (accessible > rdev->mc.aper_size)
1478 accessible = rdev->mc.aper_size; 1485 accessible = rdev->mc.aper_size;
1479 1486
1480 if (rdev->mc.vram_size > rdev->mc.aper_size) 1487 if (rdev->mc.mc_vram_size > rdev->mc.aper_size)
1481 rdev->mc.vram_size = rdev->mc.aper_size; 1488 rdev->mc.mc_vram_size = rdev->mc.aper_size;
1489
1490 if (rdev->mc.real_vram_size > rdev->mc.aper_size)
1491 rdev->mc.real_vram_size = rdev->mc.aper_size;
1482} 1492}
1483 1493
1484void r100_vram_info(struct radeon_device *rdev) 1494void r100_vram_info(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 0a981e2ee2f8..09fb0b6ec7dd 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -95,8 +95,8 @@ int r520_mc_init(struct radeon_device *rdev)
95 "programming pipes. Bad things might happen.\n"); 95 "programming pipes. Bad things might happen.\n");
96 } 96 }
97 /* Write VRAM size in case we are limiting it */ 97 /* Write VRAM size in case we are limiting it */
98 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 98 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
99 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 99 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
100 tmp = REG_SET(R520_MC_FB_TOP, tmp >> 16); 100 tmp = REG_SET(R520_MC_FB_TOP, tmp >> 16);
101 tmp |= REG_SET(R520_MC_FB_START, rdev->mc.vram_location >> 16); 101 tmp |= REG_SET(R520_MC_FB_START, rdev->mc.vram_location >> 16);
102 WREG32_MC(R520_MC_FB_LOCATION, tmp); 102 WREG32_MC(R520_MC_FB_LOCATION, tmp);
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index c45559fc97fd..538cd907df69 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -67,7 +67,7 @@ int r600_mc_init(struct radeon_device *rdev)
67 "programming pipes. Bad things might happen.\n"); 67 "programming pipes. Bad things might happen.\n");
68 } 68 }
69 69
70 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 70 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
71 tmp = REG_SET(R600_MC_FB_TOP, tmp >> 24); 71 tmp = REG_SET(R600_MC_FB_TOP, tmp >> 24);
72 tmp |= REG_SET(R600_MC_FB_BASE, rdev->mc.vram_location >> 24); 72 tmp |= REG_SET(R600_MC_FB_BASE, rdev->mc.vram_location >> 24);
73 WREG32(R600_MC_VM_FB_LOCATION, tmp); 73 WREG32(R600_MC_VM_FB_LOCATION, tmp);
@@ -140,7 +140,8 @@ void r600_vram_get_type(struct radeon_device *rdev)
140void r600_vram_info(struct radeon_device *rdev) 140void r600_vram_info(struct radeon_device *rdev)
141{ 141{
142 r600_vram_get_type(rdev); 142 r600_vram_get_type(rdev);
143 rdev->mc.vram_size = RREG32(R600_CONFIG_MEMSIZE); 143 rdev->mc.real_vram_size = RREG32(R600_CONFIG_MEMSIZE);
144 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
144 145
145 /* Could aper size report 0 ? */ 146 /* Could aper size report 0 ? */
146 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 147 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 63a3fe32e584..045b33b3bf2d 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -332,8 +332,11 @@ struct radeon_mc {
332 unsigned gtt_location; 332 unsigned gtt_location;
333 unsigned gtt_size; 333 unsigned gtt_size;
334 unsigned vram_location; 334 unsigned vram_location;
335 unsigned vram_size; 335 /* for some chips with <= 32MB we need to lie
336 * about vram size near mc fb location */
337 unsigned mc_vram_size;
336 unsigned vram_width; 338 unsigned vram_width;
339 unsigned real_vram_size;
337 int vram_mtrr; 340 int vram_mtrr;
338 bool vram_is_ddr; 341 bool vram_is_ddr;
339}; 342};
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index f78db5c8008c..6d1749e44222 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -121,7 +121,7 @@ int radeon_mc_setup(struct radeon_device *rdev)
121 if (rdev->mc.vram_location != 0xFFFFFFFFUL) { 121 if (rdev->mc.vram_location != 0xFFFFFFFFUL) {
122 /* vram location was already setup try to put gtt after 122 /* vram location was already setup try to put gtt after
123 * if it fits */ 123 * if it fits */
124 tmp = rdev->mc.vram_location + rdev->mc.vram_size; 124 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size;
125 tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1); 125 tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1);
126 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { 126 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) {
127 rdev->mc.gtt_location = tmp; 127 rdev->mc.gtt_location = tmp;
@@ -136,13 +136,13 @@ int radeon_mc_setup(struct radeon_device *rdev)
136 } else if (rdev->mc.gtt_location != 0xFFFFFFFFUL) { 136 } else if (rdev->mc.gtt_location != 0xFFFFFFFFUL) {
137 /* gtt location was already setup try to put vram before 137 /* gtt location was already setup try to put vram before
138 * if it fits */ 138 * if it fits */
139 if (rdev->mc.vram_size < rdev->mc.gtt_location) { 139 if (rdev->mc.mc_vram_size < rdev->mc.gtt_location) {
140 rdev->mc.vram_location = 0; 140 rdev->mc.vram_location = 0;
141 } else { 141 } else {
142 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size; 142 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size;
143 tmp += (rdev->mc.vram_size - 1); 143 tmp += (rdev->mc.mc_vram_size - 1);
144 tmp &= ~(rdev->mc.vram_size - 1); 144 tmp &= ~(rdev->mc.mc_vram_size - 1);
145 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.vram_size) { 145 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.mc_vram_size) {
146 rdev->mc.vram_location = tmp; 146 rdev->mc.vram_location = tmp;
147 } else { 147 } else {
148 printk(KERN_ERR "[drm] vram too big to fit " 148 printk(KERN_ERR "[drm] vram too big to fit "
@@ -152,12 +152,14 @@ int radeon_mc_setup(struct radeon_device *rdev)
152 } 152 }
153 } else { 153 } else {
154 rdev->mc.vram_location = 0; 154 rdev->mc.vram_location = 0;
155 rdev->mc.gtt_location = rdev->mc.vram_size; 155 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
156 } 156 }
157 DRM_INFO("radeon: VRAM %uM\n", rdev->mc.vram_size >> 20); 157 DRM_INFO("radeon: VRAM %uM\n", rdev->mc.real_vram_size >> 20);
158 DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n", 158 DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n",
159 rdev->mc.vram_location, 159 rdev->mc.vram_location,
160 rdev->mc.vram_location + rdev->mc.vram_size - 1); 160 rdev->mc.vram_location + rdev->mc.mc_vram_size - 1);
161 if (rdev->mc.real_vram_size != rdev->mc.mc_vram_size)
162 DRM_INFO("radeon: VRAM less than aperture workaround enabled\n");
161 DRM_INFO("radeon: GTT %uM\n", rdev->mc.gtt_size >> 20); 163 DRM_INFO("radeon: GTT %uM\n", rdev->mc.gtt_size >> 20);
162 DRM_INFO("radeon: GTT from 0x%08X to 0x%08X\n", 164 DRM_INFO("radeon: GTT from 0x%08X to 0x%08X\n",
163 rdev->mc.gtt_location, 165 rdev->mc.gtt_location,
@@ -573,7 +575,7 @@ int radeon_device_init(struct radeon_device *rdev,
573 rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size, 575 rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
574 MTRR_TYPE_WRCOMB, 1); 576 MTRR_TYPE_WRCOMB, 1);
575 DRM_INFO("Detected VRAM RAM=%uM, BAR=%uM\n", 577 DRM_INFO("Detected VRAM RAM=%uM, BAR=%uM\n",
576 rdev->mc.vram_size >> 20, 578 rdev->mc.real_vram_size >> 20,
577 (unsigned)rdev->mc.aper_size >> 20); 579 (unsigned)rdev->mc.aper_size >> 20);
578 DRM_INFO("RAM width %dbits %cDR\n", 580 DRM_INFO("RAM width %dbits %cDR\n",
579 rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S'); 581 rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
index 12542087b298..cded5180c752 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -157,9 +157,9 @@ int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
157 struct radeon_device *rdev = dev->dev_private; 157 struct radeon_device *rdev = dev->dev_private;
158 struct drm_radeon_gem_info *args = data; 158 struct drm_radeon_gem_info *args = data;
159 159
160 args->vram_size = rdev->mc.vram_size; 160 args->vram_size = rdev->mc.real_vram_size;
161 /* FIXME: report somethings that makes sense */ 161 /* FIXME: report somethings that makes sense */
162 args->vram_visible = rdev->mc.vram_size - (4 * 1024 * 1024); 162 args->vram_visible = rdev->mc.real_vram_size - (4 * 1024 * 1024);
163 args->gart_size = rdev->mc.gtt_size; 163 args->gart_size = rdev->mc.gtt_size;
164 return 0; 164 return 0;
165} 165}
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index f3469b96208c..15c3531377ed 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -454,7 +454,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
454 return r; 454 return r;
455 } 455 }
456 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, 0, 456 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, 0,
457 ((rdev->mc.aper_size) >> PAGE_SHIFT)); 457 ((rdev->mc.real_vram_size) >> PAGE_SHIFT));
458 if (r) { 458 if (r) {
459 DRM_ERROR("Failed initializing VRAM heap.\n"); 459 DRM_ERROR("Failed initializing VRAM heap.\n");
460 return r; 460 return r;
@@ -471,7 +471,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
471 return r; 471 return r;
472 } 472 }
473 DRM_INFO("radeon: %uM of VRAM memory ready\n", 473 DRM_INFO("radeon: %uM of VRAM memory ready\n",
474 rdev->mc.vram_size / (1024 * 1024)); 474 rdev->mc.real_vram_size / (1024 * 1024));
475 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, 0, 475 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, 0,
476 ((rdev->mc.gtt_size) >> PAGE_SHIFT)); 476 ((rdev->mc.gtt_size) >> PAGE_SHIFT));
477 if (r) { 477 if (r) {
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 96a3c8486d25..b29affd9c5d8 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -233,7 +233,7 @@ int rs400_mc_init(struct radeon_device *rdev)
233 233
234 rs400_gpu_init(rdev); 234 rs400_gpu_init(rdev);
235 rs400_gart_disable(rdev); 235 rs400_gart_disable(rdev);
236 rdev->mc.gtt_location = rdev->mc.vram_size; 236 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
237 rdev->mc.gtt_location += (rdev->mc.gtt_size - 1); 237 rdev->mc.gtt_location += (rdev->mc.gtt_size - 1);
238 rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1); 238 rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1);
239 r = radeon_mc_setup(rdev); 239 r = radeon_mc_setup(rdev);
@@ -247,7 +247,7 @@ int rs400_mc_init(struct radeon_device *rdev)
247 "programming pipes. Bad things might happen.\n"); 247 "programming pipes. Bad things might happen.\n");
248 } 248 }
249 249
250 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 250 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
251 tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16); 251 tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16);
252 tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16); 252 tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16);
253 WREG32(RADEON_MC_FB_LOCATION, tmp); 253 WREG32(RADEON_MC_FB_LOCATION, tmp);
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index bccdce7fd379..bbea6dee4a94 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -223,7 +223,7 @@ int rs600_mc_init(struct radeon_device *rdev)
223 printk(KERN_WARNING "Failed to wait MC idle while " 223 printk(KERN_WARNING "Failed to wait MC idle while "
224 "programming pipes. Bad things might happen.\n"); 224 "programming pipes. Bad things might happen.\n");
225 } 225 }
226 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 226 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
227 tmp = REG_SET(RS600_MC_FB_TOP, tmp >> 16); 227 tmp = REG_SET(RS600_MC_FB_TOP, tmp >> 16);
228 tmp |= REG_SET(RS600_MC_FB_START, rdev->mc.vram_location >> 16); 228 tmp |= REG_SET(RS600_MC_FB_START, rdev->mc.vram_location >> 16);
229 WREG32_MC(RS600_MC_FB_LOCATION, tmp); 229 WREG32_MC(RS600_MC_FB_LOCATION, tmp);
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 97eaee3d28b8..839595b00728 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -67,7 +67,7 @@ int rs690_mc_init(struct radeon_device *rdev)
67 rs400_gart_disable(rdev); 67 rs400_gart_disable(rdev);
68 68
69 /* Setup GPU memory space */ 69 /* Setup GPU memory space */
70 rdev->mc.gtt_location = rdev->mc.vram_size; 70 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
71 rdev->mc.gtt_location += (rdev->mc.gtt_size - 1); 71 rdev->mc.gtt_location += (rdev->mc.gtt_size - 1);
72 rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1); 72 rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1);
73 rdev->mc.vram_location = 0xFFFFFFFFUL; 73 rdev->mc.vram_location = 0xFFFFFFFFUL;
@@ -82,7 +82,7 @@ int rs690_mc_init(struct radeon_device *rdev)
82 printk(KERN_WARNING "Failed to wait MC idle while " 82 printk(KERN_WARNING "Failed to wait MC idle while "
83 "programming pipes. Bad things might happen.\n"); 83 "programming pipes. Bad things might happen.\n");
84 } 84 }
85 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 85 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
86 tmp = REG_SET(RS690_MC_FB_TOP, tmp >> 16); 86 tmp = REG_SET(RS690_MC_FB_TOP, tmp >> 16);
87 tmp |= REG_SET(RS690_MC_FB_START, rdev->mc.vram_location >> 16); 87 tmp |= REG_SET(RS690_MC_FB_START, rdev->mc.vram_location >> 16);
88 WREG32_MC(RS690_MCCFG_FB_LOCATION, tmp); 88 WREG32_MC(RS690_MCCFG_FB_LOCATION, tmp);
@@ -228,7 +228,8 @@ void rs690_vram_info(struct radeon_device *rdev)
228 } else { 228 } else {
229 rdev->mc.vram_width = 64; 229 rdev->mc.vram_width = 64;
230 } 230 }
231 rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE); 231 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
232 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
232 233
233 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 234 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
234 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 235 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 4fd411893b91..551e608702e4 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -100,10 +100,10 @@ int rv515_mc_init(struct radeon_device *rdev)
100 "programming pipes. Bad things might happen.\n"); 100 "programming pipes. Bad things might happen.\n");
101 } 101 }
102 /* Write VRAM size in case we are limiting it */ 102 /* Write VRAM size in case we are limiting it */
103 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 103 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
104 tmp = REG_SET(MC_FB_START, rdev->mc.vram_location >> 16); 104 tmp = REG_SET(MC_FB_START, rdev->mc.vram_location >> 16);
105 WREG32(0x134, tmp); 105 WREG32(0x134, tmp);
106 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 106 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
107 tmp = REG_SET(MC_FB_TOP, tmp >> 16); 107 tmp = REG_SET(MC_FB_TOP, tmp >> 16);
108 tmp |= REG_SET(MC_FB_START, rdev->mc.vram_location >> 16); 108 tmp |= REG_SET(MC_FB_START, rdev->mc.vram_location >> 16);
109 WREG32_MC(MC_FB_LOCATION, tmp); 109 WREG32_MC(MC_FB_LOCATION, tmp);
@@ -369,10 +369,7 @@ void rv515_vram_info(struct radeon_device *rdev)
369 fixed20_12 a; 369 fixed20_12 a;
370 370
371 rv515_vram_get_type(rdev); 371 rv515_vram_get_type(rdev);
372 rdev->mc.vram_size = RREG32(CONFIG_MEMSIZE);
373 372
374 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
375 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
376 /* FIXME: we should enforce default clock in case GPU is not in 373 /* FIXME: we should enforce default clock in case GPU is not in
377 * default setup 374 * default setup
378 */ 375 */
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index da50cc51ede3..21d8ffd57308 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -67,7 +67,7 @@ int rv770_mc_init(struct radeon_device *rdev)
67 "programming pipes. Bad things might happen.\n"); 67 "programming pipes. Bad things might happen.\n");
68 } 68 }
69 69
70 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 70 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
71 tmp = REG_SET(R700_MC_FB_TOP, tmp >> 24); 71 tmp = REG_SET(R700_MC_FB_TOP, tmp >> 24);
72 tmp |= REG_SET(R700_MC_FB_BASE, rdev->mc.vram_location >> 24); 72 tmp |= REG_SET(R700_MC_FB_BASE, rdev->mc.vram_location >> 24);
73 WREG32(R700_MC_VM_FB_LOCATION, tmp); 73 WREG32(R700_MC_VM_FB_LOCATION, tmp);