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authorArnd Bergmann <arnd@arndb.de>2012-03-20 18:42:24 -0400
committerArnd Bergmann <arnd@arndb.de>2012-03-20 18:42:24 -0400
commitf907ab06bb021bcb91d39c8d1b36536ebdb318fa (patch)
tree6020618997a6ea1b5f5b59c89df35344023f7c82 /drivers/gpu
parent7cc026f21e2acdcea8640df5da470c6fdca92911 (diff)
parent489e7bece7f6859a7df484a4dce08fa51fb0d876 (diff)
Merge branch 'next/fixes-non-critical' into next/drivers
Conflicts: arch/arm/mach-lpc32xx/clock.c arch/arm/mach-pxa/pxa25x.c arch/arm/mach-pxa/pxa27x.c The conflicts with pxa are non-obvious, we have multiple branches adding and removing the same clock settings. According to Haojian Zhuang, removing the sa1100 rtc dummy clock is the correct fix here. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/gma500/cdv_device.c2
-rw-r--r--drivers/gpu/drm/gma500/framebuffer.c1
-rw-r--r--drivers/gpu/drm/gma500/gtt.c9
-rw-r--r--drivers/gpu/drm/radeon/r600.c3
-rw-r--r--drivers/gpu/drm/radeon/r600_blit_shaders.c8
-rw-r--r--drivers/gpu/drm/radeon/r600d.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c18
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c11
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h2
11 files changed, 47 insertions, 16 deletions
diff --git a/drivers/gpu/drm/gma500/cdv_device.c b/drivers/gpu/drm/gma500/cdv_device.c
index 4a5b099c3bc5..53404af2e748 100644
--- a/drivers/gpu/drm/gma500/cdv_device.c
+++ b/drivers/gpu/drm/gma500/cdv_device.c
@@ -321,6 +321,8 @@ static int cdv_chip_setup(struct drm_device *dev)
321 cdv_get_core_freq(dev); 321 cdv_get_core_freq(dev);
322 gma_intel_opregion_init(dev); 322 gma_intel_opregion_init(dev);
323 psb_intel_init_bios(dev); 323 psb_intel_init_bios(dev);
324 REG_WRITE(PORT_HOTPLUG_EN, 0);
325 REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
324 return 0; 326 return 0;
325} 327}
326 328
diff --git a/drivers/gpu/drm/gma500/framebuffer.c b/drivers/gpu/drm/gma500/framebuffer.c
index 830dfdd6bf15..be616735ec91 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -247,7 +247,6 @@ static struct fb_ops psbfb_roll_ops = {
247 .fb_imageblit = cfb_imageblit, 247 .fb_imageblit = cfb_imageblit,
248 .fb_pan_display = psbfb_pan, 248 .fb_pan_display = psbfb_pan,
249 .fb_mmap = psbfb_mmap, 249 .fb_mmap = psbfb_mmap,
250 .fb_sync = psbfb_sync,
251 .fb_ioctl = psbfb_ioctl, 250 .fb_ioctl = psbfb_ioctl,
252}; 251};
253 252
diff --git a/drivers/gpu/drm/gma500/gtt.c b/drivers/gpu/drm/gma500/gtt.c
index 5d5330f667f1..aff194fbe9f3 100644
--- a/drivers/gpu/drm/gma500/gtt.c
+++ b/drivers/gpu/drm/gma500/gtt.c
@@ -446,10 +446,9 @@ int psb_gtt_init(struct drm_device *dev, int resume)
446 pg->gtt_start = pci_resource_start(dev->pdev, PSB_GTT_RESOURCE); 446 pg->gtt_start = pci_resource_start(dev->pdev, PSB_GTT_RESOURCE);
447 gtt_pages = pci_resource_len(dev->pdev, PSB_GTT_RESOURCE) 447 gtt_pages = pci_resource_len(dev->pdev, PSB_GTT_RESOURCE)
448 >> PAGE_SHIFT; 448 >> PAGE_SHIFT;
449 /* Some CDV firmware doesn't report this currently. In which case the 449 /* CDV doesn't report this. In which case the system has 64 gtt pages */
450 system has 64 gtt pages */
451 if (pg->gtt_start == 0 || gtt_pages == 0) { 450 if (pg->gtt_start == 0 || gtt_pages == 0) {
452 dev_err(dev->dev, "GTT PCI BAR not initialized.\n"); 451 dev_dbg(dev->dev, "GTT PCI BAR not initialized.\n");
453 gtt_pages = 64; 452 gtt_pages = 64;
454 pg->gtt_start = dev_priv->pge_ctl; 453 pg->gtt_start = dev_priv->pge_ctl;
455 } 454 }
@@ -461,10 +460,10 @@ int psb_gtt_init(struct drm_device *dev, int resume)
461 460
462 if (pg->gatt_pages == 0 || pg->gatt_start == 0) { 461 if (pg->gatt_pages == 0 || pg->gatt_start == 0) {
463 static struct resource fudge; /* Preferably peppermint */ 462 static struct resource fudge; /* Preferably peppermint */
464 /* This can occur on CDV SDV systems. Fudge it in this case. 463 /* This can occur on CDV systems. Fudge it in this case.
465 We really don't care what imaginary space is being allocated 464 We really don't care what imaginary space is being allocated
466 at this point */ 465 at this point */
467 dev_err(dev->dev, "GATT PCI BAR not initialized.\n"); 466 dev_dbg(dev->dev, "GATT PCI BAR not initialized.\n");
468 pg->gatt_start = 0x40000000; 467 pg->gatt_start = 0x40000000;
469 pg->gatt_pages = (128 * 1024 * 1024) >> PAGE_SHIFT; 468 pg->gatt_pages = (128 * 1024 * 1024) >> PAGE_SHIFT;
470 /* This is a little confusing but in fact the GTT is providing 469 /* This is a little confusing but in fact the GTT is providing
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index fbcd84803b60..17ca72ce3027 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2362,6 +2362,9 @@ void r600_semaphore_ring_emit(struct radeon_device *rdev,
2362 uint64_t addr = semaphore->gpu_addr; 2362 uint64_t addr = semaphore->gpu_addr;
2363 unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; 2363 unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL;
2364 2364
2365 if (rdev->family < CHIP_CAYMAN)
2366 sel |= PACKET3_SEM_WAIT_ON_SIGNAL;
2367
2365 radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); 2368 radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));
2366 radeon_ring_write(ring, addr & 0xffffffff); 2369 radeon_ring_write(ring, addr & 0xffffffff);
2367 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel); 2370 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel);
diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c
index 2d1f6c5ee2a7..73e2c7c6edbc 100644
--- a/drivers/gpu/drm/radeon/r600_blit_shaders.c
+++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c
@@ -314,6 +314,10 @@ const u32 r6xx_default_state[] =
314 0x00000000, /* VGT_VTX_CNT_EN */ 314 0x00000000, /* VGT_VTX_CNT_EN */
315 315
316 0xc0016900, 316 0xc0016900,
317 0x000000d4,
318 0x00000000, /* SX_MISC */
319
320 0xc0016900,
317 0x000002c8, 321 0x000002c8,
318 0x00000000, /* VGT_STRMOUT_BUFFER_EN */ 322 0x00000000, /* VGT_STRMOUT_BUFFER_EN */
319 323
@@ -626,6 +630,10 @@ const u32 r7xx_default_state[] =
626 0x00000000, /* VGT_VTX_CNT_EN */ 630 0x00000000, /* VGT_VTX_CNT_EN */
627 631
628 0xc0016900, 632 0xc0016900,
633 0x000000d4,
634 0x00000000, /* SX_MISC */
635
636 0xc0016900,
629 0x000002c8, 637 0x000002c8,
630 0x00000000, /* VGT_STRMOUT_BUFFER_EN */ 638 0x00000000, /* VGT_STRMOUT_BUFFER_EN */
631 639
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 3ee1fd7ef394..9b23670716f1 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -831,6 +831,7 @@
831#define PACKET3_STRMOUT_BUFFER_UPDATE 0x34 831#define PACKET3_STRMOUT_BUFFER_UPDATE 0x34
832#define PACKET3_INDIRECT_BUFFER_MP 0x38 832#define PACKET3_INDIRECT_BUFFER_MP 0x38
833#define PACKET3_MEM_SEMAPHORE 0x39 833#define PACKET3_MEM_SEMAPHORE 0x39
834# define PACKET3_SEM_WAIT_ON_SIGNAL (0x1 << 12)
834# define PACKET3_SEM_SEL_SIGNAL (0x6 << 29) 835# define PACKET3_SEM_SEL_SIGNAL (0x6 << 29)
835# define PACKET3_SEM_SEL_WAIT (0x7 << 29) 836# define PACKET3_SEM_SEL_WAIT (0x7 << 29)
836#define PACKET3_MPEG_INDEX 0x3A 837#define PACKET3_MPEG_INDEX 0x3A
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 8b3d8ed52ff6..8c9a8115b632 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1057,7 +1057,7 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
1057 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) 1057 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1058 return MODE_OK; 1058 return MODE_OK;
1059 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { 1059 else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
1060 if (ASIC_IS_DCE3(rdev)) { 1060 if (0) {
1061 /* HDMI 1.3+ supports max clock of 340 Mhz */ 1061 /* HDMI 1.3+ supports max clock of 340 Mhz */
1062 if (mode->clock > 340000) 1062 if (mode->clock > 340000)
1063 return MODE_CLOCK_HIGH; 1063 return MODE_CLOCK_HIGH;
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 8c49fef1ce78..3d314338d843 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -1078,15 +1078,21 @@ static const struct drm_framebuffer_funcs radeon_fb_funcs = {
1078 .create_handle = radeon_user_framebuffer_create_handle, 1078 .create_handle = radeon_user_framebuffer_create_handle,
1079}; 1079};
1080 1080
1081void 1081int
1082radeon_framebuffer_init(struct drm_device *dev, 1082radeon_framebuffer_init(struct drm_device *dev,
1083 struct radeon_framebuffer *rfb, 1083 struct radeon_framebuffer *rfb,
1084 struct drm_mode_fb_cmd2 *mode_cmd, 1084 struct drm_mode_fb_cmd2 *mode_cmd,
1085 struct drm_gem_object *obj) 1085 struct drm_gem_object *obj)
1086{ 1086{
1087 int ret;
1087 rfb->obj = obj; 1088 rfb->obj = obj;
1088 drm_framebuffer_init(dev, &rfb->base, &radeon_fb_funcs); 1089 ret = drm_framebuffer_init(dev, &rfb->base, &radeon_fb_funcs);
1090 if (ret) {
1091 rfb->obj = NULL;
1092 return ret;
1093 }
1089 drm_helper_mode_fill_fb_struct(&rfb->base, mode_cmd); 1094 drm_helper_mode_fill_fb_struct(&rfb->base, mode_cmd);
1095 return 0;
1090} 1096}
1091 1097
1092static struct drm_framebuffer * 1098static struct drm_framebuffer *
@@ -1096,6 +1102,7 @@ radeon_user_framebuffer_create(struct drm_device *dev,
1096{ 1102{
1097 struct drm_gem_object *obj; 1103 struct drm_gem_object *obj;
1098 struct radeon_framebuffer *radeon_fb; 1104 struct radeon_framebuffer *radeon_fb;
1105 int ret;
1099 1106
1100 obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]); 1107 obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
1101 if (obj == NULL) { 1108 if (obj == NULL) {
@@ -1108,7 +1115,12 @@ radeon_user_framebuffer_create(struct drm_device *dev,
1108 if (radeon_fb == NULL) 1115 if (radeon_fb == NULL)
1109 return ERR_PTR(-ENOMEM); 1116 return ERR_PTR(-ENOMEM);
1110 1117
1111 radeon_framebuffer_init(dev, radeon_fb, mode_cmd, obj); 1118 ret = radeon_framebuffer_init(dev, radeon_fb, mode_cmd, obj);
1119 if (ret) {
1120 kfree(radeon_fb);
1121 drm_gem_object_unreference_unlocked(obj);
1122 return NULL;
1123 }
1112 1124
1113 return &radeon_fb->base; 1125 return &radeon_fb->base;
1114} 1126}
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 9419c51bcf50..26e92708d114 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -307,8 +307,6 @@ void radeon_panel_mode_fixup(struct drm_encoder *encoder,
307bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, 307bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
308 u32 pixel_clock) 308 u32 pixel_clock)
309{ 309{
310 struct drm_device *dev = encoder->dev;
311 struct radeon_device *rdev = dev->dev_private;
312 struct drm_connector *connector; 310 struct drm_connector *connector;
313 struct radeon_connector *radeon_connector; 311 struct radeon_connector *radeon_connector;
314 struct radeon_connector_atom_dig *dig_connector; 312 struct radeon_connector_atom_dig *dig_connector;
@@ -326,7 +324,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
326 case DRM_MODE_CONNECTOR_HDMIB: 324 case DRM_MODE_CONNECTOR_HDMIB:
327 if (radeon_connector->use_digital) { 325 if (radeon_connector->use_digital) {
328 /* HDMI 1.3 supports up to 340 Mhz over single link */ 326 /* HDMI 1.3 supports up to 340 Mhz over single link */
329 if (ASIC_IS_DCE3(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) { 327 if (0 && drm_detect_hdmi_monitor(radeon_connector->edid)) {
330 if (pixel_clock > 340000) 328 if (pixel_clock > 340000)
331 return true; 329 return true;
332 else 330 else
@@ -348,7 +346,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
348 return false; 346 return false;
349 else { 347 else {
350 /* HDMI 1.3 supports up to 340 Mhz over single link */ 348 /* HDMI 1.3 supports up to 340 Mhz over single link */
351 if (ASIC_IS_DCE3(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) { 349 if (0 && drm_detect_hdmi_monitor(radeon_connector->edid)) {
352 if (pixel_clock > 340000) 350 if (pixel_clock > 340000)
353 return true; 351 return true;
354 else 352 else
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index cf2bf35b56b8..195471cf65d3 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -209,6 +209,11 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
209 sizes->surface_depth); 209 sizes->surface_depth);
210 210
211 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj); 211 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
212 if (ret) {
213 DRM_ERROR("failed to create fbcon object %d\n", ret);
214 return ret;
215 }
216
212 rbo = gem_to_radeon_bo(gobj); 217 rbo = gem_to_radeon_bo(gobj);
213 218
214 /* okay we have an object now allocate the framebuffer */ 219 /* okay we have an object now allocate the framebuffer */
@@ -220,7 +225,11 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
220 225
221 info->par = rfbdev; 226 info->par = rfbdev;
222 227
223 radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj); 228 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
229 if (ret) {
230 DRM_ERROR("failed to initalise framebuffer %d\n", ret);
231 goto out_unref;
232 }
224 233
225 fb = &rfbdev->rfb.base; 234 fb = &rfbdev->rfb.base;
226 235
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 4330e3253573..8a85598fb242 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -649,7 +649,7 @@ extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
649 u16 blue, int regno); 649 u16 blue, int regno);
650extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, 650extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
651 u16 *blue, int regno); 651 u16 *blue, int regno);
652void radeon_framebuffer_init(struct drm_device *dev, 652int radeon_framebuffer_init(struct drm_device *dev,
653 struct radeon_framebuffer *rfb, 653 struct radeon_framebuffer *rfb,
654 struct drm_mode_fb_cmd2 *mode_cmd, 654 struct drm_mode_fb_cmd2 *mode_cmd,
655 struct drm_gem_object *obj); 655 struct drm_gem_object *obj);