diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-08-12 18:58:48 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-08-19 18:45:56 -0400 |
commit | 4aab97e818c255a1bc25bb981f121a7992c6b290 (patch) | |
tree | 0d461750922ed141d50e5ffff7de618cbc25fe51 /drivers/gpu | |
parent | e13b2ac1c46b9194ea9f44904760d3d49669529b (diff) |
drm/radeon/kms/atom: clean up dig atom handling
This allows the tables to be run in some additional cases
where the connector info isn't necessary.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_encoders.c | 115 |
1 files changed, 53 insertions, 62 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 780bd302f58c..3d38cba81dc5 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -228,32 +228,6 @@ radeon_get_connector_for_encoder(struct drm_encoder *encoder) | |||
228 | return NULL; | 228 | return NULL; |
229 | } | 229 | } |
230 | 230 | ||
231 | static struct radeon_connector_atom_dig * | ||
232 | radeon_get_atom_connector_priv_from_encoder(struct drm_encoder *encoder) | ||
233 | { | ||
234 | struct drm_device *dev = encoder->dev; | ||
235 | struct radeon_device *rdev = dev->dev_private; | ||
236 | struct drm_connector *connector; | ||
237 | struct radeon_connector *radeon_connector; | ||
238 | struct radeon_connector_atom_dig *dig_connector; | ||
239 | |||
240 | if (!rdev->is_atom_bios) | ||
241 | return NULL; | ||
242 | |||
243 | connector = radeon_get_connector_for_encoder(encoder); | ||
244 | if (!connector) | ||
245 | return NULL; | ||
246 | |||
247 | radeon_connector = to_radeon_connector(connector); | ||
248 | |||
249 | if (!radeon_connector->con_priv) | ||
250 | return NULL; | ||
251 | |||
252 | dig_connector = radeon_connector->con_priv; | ||
253 | |||
254 | return dig_connector; | ||
255 | } | ||
256 | |||
257 | void radeon_panel_mode_fixup(struct drm_encoder *encoder, | 231 | void radeon_panel_mode_fixup(struct drm_encoder *encoder, |
258 | struct drm_display_mode *adjusted_mode) | 232 | struct drm_display_mode *adjusted_mode) |
259 | { | 233 | { |
@@ -512,14 +486,12 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
512 | struct radeon_device *rdev = dev->dev_private; | 486 | struct radeon_device *rdev = dev->dev_private; |
513 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 487 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
514 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 488 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
515 | struct radeon_connector_atom_dig *dig_connector = | ||
516 | radeon_get_atom_connector_priv_from_encoder(encoder); | ||
517 | union lvds_encoder_control args; | 489 | union lvds_encoder_control args; |
518 | int index = 0; | 490 | int index = 0; |
519 | int hdmi_detected = 0; | 491 | int hdmi_detected = 0; |
520 | uint8_t frev, crev; | 492 | uint8_t frev, crev; |
521 | 493 | ||
522 | if (!dig || !dig_connector) | 494 | if (!dig) |
523 | return; | 495 | return; |
524 | 496 | ||
525 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) | 497 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) |
@@ -729,13 +701,24 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
729 | struct radeon_device *rdev = dev->dev_private; | 701 | struct radeon_device *rdev = dev->dev_private; |
730 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 702 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
731 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 703 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
732 | struct radeon_connector_atom_dig *dig_connector = | 704 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
733 | radeon_get_atom_connector_priv_from_encoder(encoder); | ||
734 | union dig_encoder_control args; | 705 | union dig_encoder_control args; |
735 | int index = 0; | 706 | int index = 0; |
736 | uint8_t frev, crev; | 707 | uint8_t frev, crev; |
708 | int dp_clock = 0; | ||
709 | int dp_lane_count = 0; | ||
710 | |||
711 | if (connector) { | ||
712 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | ||
713 | struct radeon_connector_atom_dig *dig_connector = | ||
714 | radeon_connector->con_priv; | ||
715 | |||
716 | dp_clock = dig_connector->dp_clock; | ||
717 | dp_lane_count = dig_connector->dp_lane_count; | ||
718 | } | ||
737 | 719 | ||
738 | if (!dig || !dig_connector) | 720 | /* no dig encoder assigned */ |
721 | if (dig->dig_encoder == -1) | ||
739 | return; | 722 | return; |
740 | 723 | ||
741 | memset(&args, 0, sizeof(args)); | 724 | memset(&args, 0, sizeof(args)); |
@@ -757,9 +740,9 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
757 | args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder); | 740 | args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder); |
758 | 741 | ||
759 | if (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) { | 742 | if (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) { |
760 | if (dig_connector->dp_clock == 270000) | 743 | if (dp_clock == 270000) |
761 | args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; | 744 | args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; |
762 | args.v1.ucLaneNum = dig_connector->dp_lane_count; | 745 | args.v1.ucLaneNum = dp_lane_count; |
763 | } else if (radeon_encoder->pixel_clock > 165000) | 746 | } else if (radeon_encoder->pixel_clock > 165000) |
764 | args.v1.ucLaneNum = 8; | 747 | args.v1.ucLaneNum = 8; |
765 | else | 748 | else |
@@ -804,38 +787,47 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
804 | struct radeon_device *rdev = dev->dev_private; | 787 | struct radeon_device *rdev = dev->dev_private; |
805 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 788 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
806 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 789 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
807 | struct radeon_connector_atom_dig *dig_connector = | 790 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
808 | radeon_get_atom_connector_priv_from_encoder(encoder); | ||
809 | struct drm_connector *connector; | ||
810 | struct radeon_connector *radeon_connector; | ||
811 | union dig_transmitter_control args; | 791 | union dig_transmitter_control args; |
812 | int index = 0; | 792 | int index = 0; |
813 | uint8_t frev, crev; | 793 | uint8_t frev, crev; |
814 | bool is_dp = false; | 794 | bool is_dp = false; |
815 | int pll_id = 0; | 795 | int pll_id = 0; |
796 | int dp_clock = 0; | ||
797 | int dp_lane_count = 0; | ||
798 | int connector_object_id = 0; | ||
799 | int igp_lane_info = 0; | ||
800 | |||
801 | if (connector) { | ||
802 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | ||
803 | struct radeon_connector_atom_dig *dig_connector = | ||
804 | radeon_connector->con_priv; | ||
805 | |||
806 | dp_clock = dig_connector->dp_clock; | ||
807 | dp_lane_count = dig_connector->dp_lane_count; | ||
808 | connector_object_id = | ||
809 | (radeon_connector->connector_object_id & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT; | ||
810 | igp_lane_info = dig_connector->igp_lane_info; | ||
811 | } | ||
816 | 812 | ||
817 | if (!dig || !dig_connector) | 813 | /* no dig encoder assigned */ |
814 | if (dig->dig_encoder == -1) | ||
818 | return; | 815 | return; |
819 | 816 | ||
820 | connector = radeon_get_connector_for_encoder(encoder); | ||
821 | radeon_connector = to_radeon_connector(connector); | ||
822 | |||
823 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) | 817 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) |
824 | is_dp = true; | 818 | is_dp = true; |
825 | 819 | ||
826 | memset(&args, 0, sizeof(args)); | 820 | memset(&args, 0, sizeof(args)); |
827 | 821 | ||
828 | if (ASIC_IS_DCE32(rdev) || ASIC_IS_DCE4(rdev)) | 822 | switch (radeon_encoder->encoder_id) { |
823 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | ||
824 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | ||
825 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | ||
829 | index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl); | 826 | index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl); |
830 | else { | 827 | break; |
831 | switch (radeon_encoder->encoder_id) { | 828 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
832 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 829 | index = GetIndexIntoMasterTable(COMMAND, LVTMATransmitterControl); |
833 | index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl); | 830 | break; |
834 | break; | ||
835 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: | ||
836 | index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl); | ||
837 | break; | ||
838 | } | ||
839 | } | 831 | } |
840 | 832 | ||
841 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) | 833 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
@@ -843,15 +835,14 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
843 | 835 | ||
844 | args.v1.ucAction = action; | 836 | args.v1.ucAction = action; |
845 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { | 837 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { |
846 | args.v1.usInitInfo = | 838 | args.v1.usInitInfo = connector_object_id; |
847 | (radeon_connector->connector_object_id & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT; | ||
848 | } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) { | 839 | } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) { |
849 | args.v1.asMode.ucLaneSel = lane_num; | 840 | args.v1.asMode.ucLaneSel = lane_num; |
850 | args.v1.asMode.ucLaneSet = lane_set; | 841 | args.v1.asMode.ucLaneSet = lane_set; |
851 | } else { | 842 | } else { |
852 | if (is_dp) | 843 | if (is_dp) |
853 | args.v1.usPixelClock = | 844 | args.v1.usPixelClock = |
854 | cpu_to_le16(dig_connector->dp_clock / 10); | 845 | cpu_to_le16(dp_clock / 10); |
855 | else if (radeon_encoder->pixel_clock > 165000) | 846 | else if (radeon_encoder->pixel_clock > 165000) |
856 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); | 847 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
857 | else | 848 | else |
@@ -859,7 +850,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
859 | } | 850 | } |
860 | if (ASIC_IS_DCE4(rdev)) { | 851 | if (ASIC_IS_DCE4(rdev)) { |
861 | if (is_dp) | 852 | if (is_dp) |
862 | args.v3.ucLaneNum = dig_connector->dp_lane_count; | 853 | args.v3.ucLaneNum = dp_lane_count; |
863 | else if (radeon_encoder->pixel_clock > 165000) | 854 | else if (radeon_encoder->pixel_clock > 165000) |
864 | args.v3.ucLaneNum = 8; | 855 | args.v3.ucLaneNum = 8; |
865 | else | 856 | else |
@@ -939,18 +930,18 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
939 | if ((rdev->flags & RADEON_IS_IGP) && | 930 | if ((rdev->flags & RADEON_IS_IGP) && |
940 | (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) { | 931 | (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) { |
941 | if (is_dp || (radeon_encoder->pixel_clock <= 165000)) { | 932 | if (is_dp || (radeon_encoder->pixel_clock <= 165000)) { |
942 | if (dig_connector->igp_lane_info & 0x1) | 933 | if (igp_lane_info & 0x1) |
943 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; | 934 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; |
944 | else if (dig_connector->igp_lane_info & 0x2) | 935 | else if (igp_lane_info & 0x2) |
945 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; | 936 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; |
946 | else if (dig_connector->igp_lane_info & 0x4) | 937 | else if (igp_lane_info & 0x4) |
947 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; | 938 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; |
948 | else if (dig_connector->igp_lane_info & 0x8) | 939 | else if (igp_lane_info & 0x8) |
949 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; | 940 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; |
950 | } else { | 941 | } else { |
951 | if (dig_connector->igp_lane_info & 0x3) | 942 | if (igp_lane_info & 0x3) |
952 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; | 943 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; |
953 | else if (dig_connector->igp_lane_info & 0xc) | 944 | else if (igp_lane_info & 0xc) |
954 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; | 945 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; |
955 | } | 946 | } |
956 | } | 947 | } |