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authorChris Wilson <chris@chris-wilson.co.uk>2010-07-17 08:38:43 -0400
committerEric Anholt <eric@anholt.net>2010-08-01 22:35:16 -0400
commit71677043350874c55f60dce06a03ab61e3af6e93 (patch)
treecc7e22c3b1db5313b4ae4509326cbaee4d74d2d6 /drivers/gpu
parent4f444071702bf0b76cfb381150cf0fc8cacdc931 (diff)
drm/i915: Remove the redundant check for a fixed_panel_mode
We already checked just a couple of lines above that we have found a fixed_panel_mode for the LVDS, so remove the surplus check. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c32
1 files changed, 15 insertions, 17 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 0eab8df5bf7e..6ef9388c54d3 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -200,27 +200,25 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
200 if (dev_priv->panel_fixed_mode == NULL) 200 if (dev_priv->panel_fixed_mode == NULL)
201 return true; 201 return true;
202 /* 202 /*
203 * If we have timings from the BIOS for the panel, put them in 203 * We have timings from the BIOS for the panel, put them in
204 * to the adjusted mode. The CRTC will be set up for this mode, 204 * to the adjusted mode. The CRTC will be set up for this mode,
205 * with the panel scaling set up to source from the H/VDisplay 205 * with the panel scaling set up to source from the H/VDisplay
206 * of the original mode. 206 * of the original mode.
207 */ 207 */
208 if (dev_priv->panel_fixed_mode != NULL) { 208 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
209 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay; 209 adjusted_mode->hsync_start =
210 adjusted_mode->hsync_start = 210 dev_priv->panel_fixed_mode->hsync_start;
211 dev_priv->panel_fixed_mode->hsync_start; 211 adjusted_mode->hsync_end =
212 adjusted_mode->hsync_end = 212 dev_priv->panel_fixed_mode->hsync_end;
213 dev_priv->panel_fixed_mode->hsync_end; 213 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
214 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal; 214 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
215 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay; 215 adjusted_mode->vsync_start =
216 adjusted_mode->vsync_start = 216 dev_priv->panel_fixed_mode->vsync_start;
217 dev_priv->panel_fixed_mode->vsync_start; 217 adjusted_mode->vsync_end =
218 adjusted_mode->vsync_end = 218 dev_priv->panel_fixed_mode->vsync_end;
219 dev_priv->panel_fixed_mode->vsync_end; 219 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
220 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal; 220 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
221 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock; 221 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
222 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
223 }
224 222
225 /* Make sure pre-965s set dither correctly */ 223 /* Make sure pre-965s set dither correctly */
226 if (!IS_I965G(dev)) { 224 if (!IS_I965G(dev)) {