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authorDave Airlie <airlied@redhat.com>2010-02-18 00:58:36 -0500
committerDave Airlie <airlied@redhat.com>2010-02-22 18:46:21 -0500
commitf735261baab3a275a273533c391d2d1b86a9e66a (patch)
tree7e54979f5d13a846866a8a5c477237b43b41198e /drivers/gpu
parentb4fe945405e477cded91772b4fec854705443dd5 (diff)
[rfc] drm/radeon/kms: pm debugging check for vbl.
This patch adds a check on avivo chips to see if we are in the VBL region for the active crtcs when we trigger the engine change. I appear to have glitches locally on pm transistion (not sure all fixes are in yet) and this at least seems to be correct here, maybe others can test on systems with no glitches.
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/avivod.h2
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c27
2 files changed, 29 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/avivod.h b/drivers/gpu/drm/radeon/avivod.h
index d4e6e6e4a938..3c391e7e9fd4 100644
--- a/drivers/gpu/drm/radeon/avivod.h
+++ b/drivers/gpu/drm/radeon/avivod.h
@@ -30,11 +30,13 @@
30 30
31#define D1CRTC_CONTROL 0x6080 31#define D1CRTC_CONTROL 0x6080
32#define CRTC_EN (1 << 0) 32#define CRTC_EN (1 << 0)
33#define D1CRTC_STATUS 0x609c
33#define D1CRTC_UPDATE_LOCK 0x60E8 34#define D1CRTC_UPDATE_LOCK 0x60E8
34#define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 35#define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110
35#define D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 36#define D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118
36 37
37#define D2CRTC_CONTROL 0x6880 38#define D2CRTC_CONTROL 0x6880
39#define D2CRTC_STATUS 0x689c
38#define D2CRTC_UPDATE_LOCK 0x68E8 40#define D2CRTC_UPDATE_LOCK 0x68E8
39#define D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910 41#define D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910
40#define D2GRPH_SECONDARY_SURFACE_ADDRESS 0x6918 42#define D2GRPH_SECONDARY_SURFACE_ADDRESS 0x6918
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index f0234351fd57..6dbfdf48a5f5 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -22,6 +22,7 @@
22 */ 22 */
23#include "drmP.h" 23#include "drmP.h"
24#include "radeon.h" 24#include "radeon.h"
25#include "avivod.h"
25 26
26#define RADEON_IDLE_LOOP_MS 100 27#define RADEON_IDLE_LOOP_MS 100
27#define RADEON_RECLOCK_DELAY_MS 200 28#define RADEON_RECLOCK_DELAY_MS 200
@@ -283,6 +284,28 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev)
283 mutex_unlock(&rdev->pm.mutex); 284 mutex_unlock(&rdev->pm.mutex);
284} 285}
285 286
287static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish)
288{
289 u32 stat_crtc1 = 0, stat_crtc2 = 0;
290 bool in_vbl = true;
291
292 if (ASIC_IS_AVIVO(rdev)) {
293 if (rdev->pm.active_crtcs & (1 << 0)) {
294 stat_crtc1 = RREG32(D1CRTC_STATUS);
295 if (!(stat_crtc1 & 1))
296 in_vbl = false;
297 }
298 if (rdev->pm.active_crtcs & (1 << 1)) {
299 stat_crtc2 = RREG32(D2CRTC_STATUS);
300 if (!(stat_crtc2 & 1))
301 in_vbl = false;
302 }
303 }
304 if (in_vbl == false)
305 DRM_INFO("not in vbl for pm change %08x %08x at %s\n", stat_crtc1,
306 stat_crtc2, finish ? "exit" : "entry");
307 return in_vbl;
308}
286static void radeon_pm_set_clocks_locked(struct radeon_device *rdev) 309static void radeon_pm_set_clocks_locked(struct radeon_device *rdev)
287{ 310{
288 /*radeon_fence_wait_last(rdev);*/ 311 /*radeon_fence_wait_last(rdev);*/
@@ -299,7 +322,11 @@ static void radeon_pm_set_clocks_locked(struct radeon_device *rdev)
299 DRM_ERROR("%s: PM_ACTION_NONE\n", __func__); 322 DRM_ERROR("%s: PM_ACTION_NONE\n", __func__);
300 break; 323 break;
301 } 324 }
325
326 /* check if we are in vblank */
327 radeon_pm_debug_check_in_vbl(rdev, false);
302 radeon_set_power_state(rdev); 328 radeon_set_power_state(rdev);
329 radeon_pm_debug_check_in_vbl(rdev, true);
303 rdev->pm.planned_action = PM_ACTION_NONE; 330 rdev->pm.planned_action = PM_ACTION_NONE;
304} 331}
305 332