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authorMichel Dänzer <daenzer@vmware.com>2009-10-08 04:44:09 -0400
committerDave Airlie <airlied@redhat.com>2009-10-11 23:42:14 -0400
commitf30f37def4c72e5df8d949022b806e5a4e99bbcb (patch)
tree31753243c6e90e0d7aeda291bbd0ae9532e75fde /drivers/gpu
parente33497aaaef5ec9998cf7b007b13d74bb41be74e (diff)
drm/radeon/kms: Update memory bandwidth requirements in mode_set_base hook.
The hook may change the number of bytes per pixel being scanned out, which affects the CRTC memory bandwidth requirements. E.g. booting in 8bpp and then running X in 32bpp would result in the bandwidth requirements being underestimated for the latter and consequently in CRTC FIFO underruns causing visible artifacts with 3D intensive workloads. ATOM changes only compile-tested. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c7
2 files changed, 8 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 14fa9701aeb3..38a87cc6eb12 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -563,6 +563,10 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
563 radeon_fb = to_radeon_framebuffer(old_fb); 563 radeon_fb = to_radeon_framebuffer(old_fb);
564 radeon_gem_object_unpin(radeon_fb->obj); 564 radeon_gem_object_unpin(radeon_fb->obj);
565 } 565 }
566
567 /* Bytes per pixel may have changed */
568 radeon_bandwidth_update(rdev);
569
566 return 0; 570 return 0;
567} 571}
568 572
@@ -701,7 +705,6 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
701 } 705 }
702 atombios_overscan_setup(crtc, mode, adjusted_mode); 706 atombios_overscan_setup(crtc, mode, adjusted_mode);
703 atombios_scaler_setup(crtc); 707 atombios_scaler_setup(crtc);
704 radeon_bandwidth_update(rdev);
705 return 0; 708 return 0;
706} 709}
707 710
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 36410f85d705..ec2df739c119 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -532,6 +532,10 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
532 radeon_fb = to_radeon_framebuffer(old_fb); 532 radeon_fb = to_radeon_framebuffer(old_fb);
533 radeon_gem_object_unpin(radeon_fb->obj); 533 radeon_gem_object_unpin(radeon_fb->obj);
534 } 534 }
535
536 /* Bytes per pixel may have changed */
537 radeon_bandwidth_update(rdev);
538
535 return 0; 539 return 0;
536} 540}
537 541
@@ -1015,14 +1019,11 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc,
1015 int x, int y, struct drm_framebuffer *old_fb) 1019 int x, int y, struct drm_framebuffer *old_fb)
1016{ 1020{
1017 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 1021 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1018 struct drm_device *dev = crtc->dev;
1019 struct radeon_device *rdev = dev->dev_private;
1020 1022
1021 /* TODO TV */ 1023 /* TODO TV */
1022 radeon_crtc_set_base(crtc, x, y, old_fb); 1024 radeon_crtc_set_base(crtc, x, y, old_fb);
1023 radeon_set_crtc_timing(crtc, adjusted_mode); 1025 radeon_set_crtc_timing(crtc, adjusted_mode);
1024 radeon_set_pll(crtc, adjusted_mode); 1026 radeon_set_pll(crtc, adjusted_mode);
1025 radeon_bandwidth_update(rdev);
1026 if (radeon_crtc->crtc_id == 0) { 1027 if (radeon_crtc->crtc_id == 0) {
1027 radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode); 1028 radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode);
1028 } else { 1029 } else {