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authorJiri Kosina <jkosina@suse.cz>2009-12-07 12:36:35 -0500
committerJiri Kosina <jkosina@suse.cz>2009-12-07 12:36:35 -0500
commitd014d043869cdc591f3a33243d3481fa4479c2d0 (patch)
tree63626829498e647ba058a1ce06419fe7e4d5f97d /drivers/gpu
parent6ec22f9b037fc0c2e00ddb7023fad279c365324d (diff)
parent6070d81eb5f2d4943223c96e7609a53cdc984364 (diff)
Merge branch 'for-next' into for-linus
Conflicts: kernel/irq/chip.c
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/drm_crtc.c4
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c2
-rw-r--r--drivers/gpu/drm/i915/intel_fb.c2
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c2
-rw-r--r--drivers/gpu/drm/radeon/atombios.h16
-rw-r--r--drivers/gpu/drm/radeon/r600.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_state.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c2
-rw-r--r--drivers/gpu/drm/radeon/rv770.c4
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_util.c2
11 files changed, 21 insertions, 21 deletions
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 5cae0b3eee9b..3f7c500b2115 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -272,7 +272,7 @@ EXPORT_SYMBOL(drm_mode_object_find);
272 * functions & device file and adds it to the master fd list. 272 * functions & device file and adds it to the master fd list.
273 * 273 *
274 * RETURNS: 274 * RETURNS:
275 * Zero on success, error code on falure. 275 * Zero on success, error code on failure.
276 */ 276 */
277int drm_framebuffer_init(struct drm_device *dev, struct drm_framebuffer *fb, 277int drm_framebuffer_init(struct drm_device *dev, struct drm_framebuffer *fb,
278 const struct drm_framebuffer_funcs *funcs) 278 const struct drm_framebuffer_funcs *funcs)
@@ -2328,7 +2328,7 @@ int drm_mode_connector_property_set_ioctl(struct drm_device *dev,
2328 } else if (connector->funcs->set_property) 2328 } else if (connector->funcs->set_property)
2329 ret = connector->funcs->set_property(connector, property, out_resp->value); 2329 ret = connector->funcs->set_property(connector, property, out_resp->value);
2330 2330
2331 /* store the property value if succesful */ 2331 /* store the property value if successful */
2332 if (!ret) 2332 if (!ret)
2333 drm_connector_property_set_value(connector, property, out_resp->value); 2333 drm_connector_property_set_value(connector, property, out_resp->value);
2334out: 2334out:
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index abfc27b0c2ea..a2a3fa599923 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1309,7 +1309,7 @@ out_free_list:
1309 * i915_gem_release_mmap - remove physical page mappings 1309 * i915_gem_release_mmap - remove physical page mappings
1310 * @obj: obj in question 1310 * @obj: obj in question
1311 * 1311 *
1312 * Preserve the reservation of the mmaping with the DRM core code, but 1312 * Preserve the reservation of the mmapping with the DRM core code, but
1313 * relinquish ownership of the pages back to the system. 1313 * relinquish ownership of the pages back to the system.
1314 * 1314 *
1315 * It is vital that we remove the page mapping if we have mapped a tiled 1315 * It is vital that we remove the page mapping if we have mapped a tiled
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 2b0fe54cd92c..40fcf6fdef38 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -70,7 +70,7 @@ static struct drm_fb_helper_funcs intel_fb_helper_funcs = {
70 70
71 71
72/** 72/**
73 * Curretly it is assumed that the old framebuffer is reused. 73 * Currently it is assumed that the old framebuffer is reused.
74 * 74 *
75 * LOCKING 75 * LOCKING
76 * caller should hold the mode config lock. 76 * caller should hold the mode config lock.
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 083bec2e50f9..e7fa3279e2f8 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -2726,7 +2726,7 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
2726 /* Wrap with our custom algo which switches to DDC mode */ 2726 /* Wrap with our custom algo which switches to DDC mode */
2727 intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; 2727 intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
2728 2728
2729 /* In defaut case sdvo lvds is false */ 2729 /* In default case sdvo lvds is false */
2730 intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps); 2730 intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps);
2731 2731
2732 if (intel_sdvo_output_setup(intel_output, 2732 if (intel_sdvo_output_setup(intel_output,
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index c11ddddfb3b6..6643afc36cea 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -1141,7 +1141,7 @@ typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS {
1141/* ucTableFormatRevision=1,ucTableContentRevision=2 */ 1141/* ucTableFormatRevision=1,ucTableContentRevision=2 */
1142typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 { 1142typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 {
1143 USHORT usPixelClock; /* in 10KHz; for bios convenient */ 1143 USHORT usPixelClock; /* in 10KHz; for bios convenient */
1144 UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx defintions below */ 1144 UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx definitions below */
1145 UCHAR ucAction; /* 0: turn off encoder */ 1145 UCHAR ucAction; /* 0: turn off encoder */
1146 /* 1: setup and turn on encoder */ 1146 /* 1: setup and turn on encoder */
1147 UCHAR ucTruncate; /* bit0=0: Disable truncate */ 1147 UCHAR ucTruncate; /* bit0=0: Disable truncate */
@@ -1424,7 +1424,7 @@ typedef struct _ATOM_MULTIMEDIA_CONFIG_INFO {
1424/* Structures used in FirmwareInfoTable */ 1424/* Structures used in FirmwareInfoTable */
1425/****************************************************************************/ 1425/****************************************************************************/
1426 1426
1427/* usBIOSCapability Defintion: */ 1427/* usBIOSCapability Definition: */
1428/* Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */ 1428/* Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */
1429/* Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */ 1429/* Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */
1430/* Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */ 1430/* Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */
@@ -2386,7 +2386,7 @@ typedef struct _ATOM_ANALOG_TV_INFO_V1_2 {
2386} ATOM_ANALOG_TV_INFO_V1_2; 2386} ATOM_ANALOG_TV_INFO_V1_2;
2387 2387
2388/**************************************************************************/ 2388/**************************************************************************/
2389/* VRAM usage and their defintions */ 2389/* VRAM usage and their definitions */
2390 2390
2391/* One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */ 2391/* One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */
2392/* Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */ 2392/* Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */
@@ -3046,7 +3046,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3046#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC 2 3046#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC 2
3047#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3 3047#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3
3048 3048
3049/* Byte aligned defintion for BIOS usage */ 3049/* Byte aligned definition for BIOS usage */
3050#define ATOM_S0_CRT1_MONOb0 0x01 3050#define ATOM_S0_CRT1_MONOb0 0x01
3051#define ATOM_S0_CRT1_COLORb0 0x02 3051#define ATOM_S0_CRT1_COLORb0 0x02
3052#define ATOM_S0_CRT1_MASKb0 (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0) 3052#define ATOM_S0_CRT1_MASKb0 (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0)
@@ -3131,7 +3131,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3131#define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30 3131#define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30
3132#define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK 0xC0000000L 3132#define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK 0xC0000000L
3133 3133
3134/* Byte aligned defintion for BIOS usage */ 3134/* Byte aligned definition for BIOS usage */
3135#define ATOM_S2_TV1_STANDARD_MASKb0 0x0F 3135#define ATOM_S2_TV1_STANDARD_MASKb0 0x0F
3136#define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF 3136#define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF
3137#define ATOM_S2_CRT1_DPMS_STATEb2 0x01 3137#define ATOM_S2_CRT1_DPMS_STATEb2 0x01
@@ -3190,7 +3190,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3190#define ATOM_S3_ALLOW_FAST_PWR_SWITCH 0x40000000L 3190#define ATOM_S3_ALLOW_FAST_PWR_SWITCH 0x40000000L
3191#define ATOM_S3_RQST_GPU_USE_MIN_PWR 0x80000000L 3191#define ATOM_S3_RQST_GPU_USE_MIN_PWR 0x80000000L
3192 3192
3193/* Byte aligned defintion for BIOS usage */ 3193/* Byte aligned definition for BIOS usage */
3194#define ATOM_S3_CRT1_ACTIVEb0 0x01 3194#define ATOM_S3_CRT1_ACTIVEb0 0x01
3195#define ATOM_S3_LCD1_ACTIVEb0 0x02 3195#define ATOM_S3_LCD1_ACTIVEb0 0x02
3196#define ATOM_S3_TV1_ACTIVEb0 0x04 3196#define ATOM_S3_TV1_ACTIVEb0 0x04
@@ -3230,7 +3230,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3230#define ATOM_S4_LCD1_REFRESH_MASK 0x0000FF00L 3230#define ATOM_S4_LCD1_REFRESH_MASK 0x0000FF00L
3231#define ATOM_S4_LCD1_REFRESH_SHIFT 8 3231#define ATOM_S4_LCD1_REFRESH_SHIFT 8
3232 3232
3233/* Byte aligned defintion for BIOS usage */ 3233/* Byte aligned definition for BIOS usage */
3234#define ATOM_S4_LCD1_PANEL_ID_MASKb0 0x0FF 3234#define ATOM_S4_LCD1_PANEL_ID_MASKb0 0x0FF
3235#define ATOM_S4_LCD1_REFRESH_MASKb1 ATOM_S4_LCD1_PANEL_ID_MASKb0 3235#define ATOM_S4_LCD1_REFRESH_MASKb1 ATOM_S4_LCD1_PANEL_ID_MASKb0
3236#define ATOM_S4_VRAM_INFO_MASKb2 ATOM_S4_LCD1_PANEL_ID_MASKb0 3236#define ATOM_S4_VRAM_INFO_MASKb2 ATOM_S4_LCD1_PANEL_ID_MASKb0
@@ -3310,7 +3310,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3310#define ATOM_S6_VRI_BRIGHTNESS_CHANGE 0x40000000L 3310#define ATOM_S6_VRI_BRIGHTNESS_CHANGE 0x40000000L
3311#define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK 0x80000000L 3311#define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK 0x80000000L
3312 3312
3313/* Byte aligned defintion for BIOS usage */ 3313/* Byte aligned definition for BIOS usage */
3314#define ATOM_S6_DEVICE_CHANGEb0 0x01 3314#define ATOM_S6_DEVICE_CHANGEb0 0x01
3315#define ATOM_S6_SCALER_CHANGEb0 0x02 3315#define ATOM_S6_SCALER_CHANGEb0 0x02
3316#define ATOM_S6_LID_CHANGEb0 0x04 3316#define ATOM_S6_LID_CHANGEb0 0x04
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 278f646bc18e..6740ed24358f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -394,11 +394,11 @@ int r600_mc_init(struct radeon_device *rdev)
394 * AGP so that GPU can catch out of VRAM/AGP access 394 * AGP so that GPU can catch out of VRAM/AGP access
395 */ 395 */
396 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) { 396 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
397 /* Enought place before */ 397 /* Enough place before */
398 rdev->mc.vram_location = rdev->mc.gtt_location - 398 rdev->mc.vram_location = rdev->mc.gtt_location -
399 rdev->mc.mc_vram_size; 399 rdev->mc.mc_vram_size;
400 } else if (tmp > rdev->mc.mc_vram_size) { 400 } else if (tmp > rdev->mc.mc_vram_size) {
401 /* Enought place after */ 401 /* Enough place after */
402 rdev->mc.vram_location = rdev->mc.gtt_location + 402 rdev->mc.vram_location = rdev->mc.gtt_location +
403 rdev->mc.gtt_size; 403 rdev->mc.gtt_size;
404 } else { 404 } else {
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index b38c4c8e2c61..d10eb43645c8 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -59,7 +59,7 @@ static struct fb_ops radeonfb_ops = {
59}; 59};
60 60
61/** 61/**
62 * Curretly it is assumed that the old framebuffer is reused. 62 * Currently it is assumed that the old framebuffer is reused.
63 * 63 *
64 * LOCKING 64 * LOCKING
65 * caller should hold the mode config lock. 65 * caller should hold the mode config lock.
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index 38537d971a3e..067167cb39ca 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -1950,7 +1950,7 @@ static void radeon_apply_surface_regs(int surf_index,
1950 * Note that refcount can be at most 2, since during a free refcount=3 1950 * Note that refcount can be at most 2, since during a free refcount=3
1951 * might mean we have to allocate a new surface which might not always 1951 * might mean we have to allocate a new surface which might not always
1952 * be available. 1952 * be available.
1953 * For example : we allocate three contigous surfaces ABC. If B is 1953 * For example : we allocate three contiguous surfaces ABC. If B is
1954 * freed, we suddenly need two surfaces to store A and C, which might 1954 * freed, we suddenly need two surfaces to store A and C, which might
1955 * not always be available. 1955 * not always be available.
1956 */ 1956 */
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 1381e06d6af3..eda4ade24c3a 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -378,7 +378,7 @@ static int radeon_bo_move(struct ttm_buffer_object *bo,
378 new_mem->mem_type == TTM_PL_SYSTEM) || 378 new_mem->mem_type == TTM_PL_SYSTEM) ||
379 (old_mem->mem_type == TTM_PL_SYSTEM && 379 (old_mem->mem_type == TTM_PL_SYSTEM &&
380 new_mem->mem_type == TTM_PL_TT)) { 380 new_mem->mem_type == TTM_PL_TT)) {
381 /* bind is enought */ 381 /* bind is enough */
382 radeon_move_null(bo, new_mem); 382 radeon_move_null(bo, new_mem);
383 return 0; 383 return 0;
384 } 384 }
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index b0efd0ddae7a..5e06ee7076f5 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -829,11 +829,11 @@ int rv770_mc_init(struct radeon_device *rdev)
829 * AGP so that GPU can catch out of VRAM/AGP access 829 * AGP so that GPU can catch out of VRAM/AGP access
830 */ 830 */
831 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) { 831 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
832 /* Enought place before */ 832 /* Enough place before */
833 rdev->mc.vram_location = rdev->mc.gtt_location - 833 rdev->mc.vram_location = rdev->mc.gtt_location -
834 rdev->mc.mc_vram_size; 834 rdev->mc.mc_vram_size;
835 } else if (tmp > rdev->mc.mc_vram_size) { 835 } else if (tmp > rdev->mc.mc_vram_size) {
836 /* Enought place after */ 836 /* Enough place after */
837 rdev->mc.vram_location = rdev->mc.gtt_location + 837 rdev->mc.vram_location = rdev->mc.gtt_location +
838 rdev->mc.gtt_size; 838 rdev->mc.gtt_size;
839 } else { 839 } else {
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index c70927ecda21..61c5572d2b91 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -427,7 +427,7 @@ static int ttm_bo_kmap_ttm(struct ttm_buffer_object *bo,
427 427
428 /* 428 /*
429 * We need to use vmap to get the desired page protection 429 * We need to use vmap to get the desired page protection
430 * or to make the buffer object look contigous. 430 * or to make the buffer object look contiguous.
431 */ 431 */
432 prot = (mem->placement & TTM_PL_FLAG_CACHED) ? 432 prot = (mem->placement & TTM_PL_FLAG_CACHED) ?
433 PAGE_KERNEL : 433 PAGE_KERNEL :