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authorLinus Torvalds <torvalds@linux-foundation.org>2011-07-02 12:08:56 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-07-02 12:08:56 -0400
commit6e139047e2eecd0ccf8bc2f1564e82747cb6e56c (patch)
tree7a6da9101cb04b918a3c76bfe21abbd2bdeb4d99 /drivers/gpu
parentc66a86d0cdce3bad2da794f114cc37377d242c3d (diff)
parent6002525170df5f72c92ab946b6ebf1656aaec74d (diff)
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: Revert "drm/nvc0: recognise 0xdX chipsets as NV_C0" drm/radeon/kms: fix typo in cayman reg offset drm/radeon/kms: use correct reg on fusion when reading back mem config
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c2
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c5
-rw-r--r--drivers/gpu/drm/radeon/nid.h2
3 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 144f79a350ae..731acea865b5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -371,7 +371,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
371 engine->vram.flags_valid = nv50_vram_flags_valid; 371 engine->vram.flags_valid = nv50_vram_flags_valid;
372 break; 372 break;
373 case 0xC0: 373 case 0xC0:
374 case 0xD0:
375 engine->instmem.init = nvc0_instmem_init; 374 engine->instmem.init = nvc0_instmem_init;
376 engine->instmem.takedown = nvc0_instmem_takedown; 375 engine->instmem.takedown = nvc0_instmem_takedown;
377 engine->instmem.suspend = nvc0_instmem_suspend; 376 engine->instmem.suspend = nvc0_instmem_suspend;
@@ -923,7 +922,6 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
923 dev_priv->card_type = NV_50; 922 dev_priv->card_type = NV_50;
924 break; 923 break;
925 case 0xc0: 924 case 0xc0:
926 case 0xd0:
927 dev_priv->card_type = NV_C0; 925 dev_priv->card_type = NV_C0;
928 break; 926 break;
929 default: 927 default:
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 12d2fdc52414..e8a5ffb0124d 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2248,7 +2248,10 @@ int evergreen_mc_init(struct radeon_device *rdev)
2248 2248
2249 /* Get VRAM informations */ 2249 /* Get VRAM informations */
2250 rdev->mc.vram_is_ddr = true; 2250 rdev->mc.vram_is_ddr = true;
2251 tmp = RREG32(MC_ARB_RAMCFG); 2251 if (rdev->flags & RADEON_IS_IGP)
2252 tmp = RREG32(FUS_MC_ARB_RAMCFG);
2253 else
2254 tmp = RREG32(MC_ARB_RAMCFG);
2252 if (tmp & CHANSIZE_OVERRIDE) { 2255 if (tmp & CHANSIZE_OVERRIDE) {
2253 chansize = 16; 2256 chansize = 16;
2254 } else if (tmp & CHANSIZE_MASK) { 2257 } else if (tmp & CHANSIZE_MASK) {
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index 9736746da2d6..4672869cdb26 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -320,7 +320,7 @@
320#define CGTS_USER_TCC_DISABLE 0x914C 320#define CGTS_USER_TCC_DISABLE 0x914C
321#define TCC_DISABLE_MASK 0xFFFF0000 321#define TCC_DISABLE_MASK 0xFFFF0000
322#define TCC_DISABLE_SHIFT 16 322#define TCC_DISABLE_SHIFT 16
323#define CGTS_SM_CTRL_REG 0x915C 323#define CGTS_SM_CTRL_REG 0x9150
324#define OVERRIDE (1 << 21) 324#define OVERRIDE (1 << 21)
325 325
326#define TA_CNTL_AUX 0x9508 326#define TA_CNTL_AUX 0x9508