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authorChris Wilson <chris@chris-wilson.co.uk>2012-12-03 16:03:14 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-12-06 19:16:15 -0500
commite9b73c67390a5d4faec1d22cbdf24cd6fcca53f6 (patch)
tree5eef72c851d44d956d20e81678123146a2d71542 /drivers/gpu
parente69d0bc1c67520c302e070ac078975ea9c786de8 (diff)
drm/i915: Reduce memory pressure during shrinker by preallocating swizzle pages
On a machine with bit17 swizzling, we need to store the bit17 of the physical page address in put-pages. This requires a memory allocation, on average less than a page, which may be difficult to satisfy is the request to put-pages is on behalf of the shrinker. We could allow that allocation to pull from the reserved memory pools, but it seems much safer to preallocate the array for tiled objects on affected machines. v2: Export i915_gem_object_needs_bit17_swizzle() for reuse. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h10
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c8
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c12
3 files changed, 22 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e9ac3603fbdb..2ab476df1dc2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -30,6 +30,8 @@
30#ifndef _I915_DRV_H_ 30#ifndef _I915_DRV_H_
31#define _I915_DRV_H_ 31#define _I915_DRV_H_
32 32
33#include <uapi/drm/i915_drm.h>
34
33#include "i915_reg.h" 35#include "i915_reg.h"
34#include "intel_bios.h" 36#include "intel_bios.h"
35#include "intel_ringbuffer.h" 37#include "intel_ringbuffer.h"
@@ -1614,6 +1616,14 @@ i915_gem_object_create_stolen(struct drm_device *dev, u32 size);
1614void i915_gem_object_release_stolen(struct drm_i915_gem_object *obj); 1616void i915_gem_object_release_stolen(struct drm_i915_gem_object *obj);
1615 1617
1616/* i915_gem_tiling.c */ 1618/* i915_gem_tiling.c */
1619inline static bool i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_object *obj)
1620{
1621 drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
1622
1623 return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&
1624 obj->tiling_mode != I915_TILING_NONE;
1625}
1626
1617void i915_gem_detect_bit_6_swizzle(struct drm_device *dev); 1627void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
1618void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj); 1628void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj);
1619void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj); 1629void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 02d315164aa9..e4b233df576f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -271,14 +271,6 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
271 args->size, &args->handle); 271 args->size, &args->handle);
272} 272}
273 273
274static int i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_object *obj)
275{
276 drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
277
278 return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&
279 obj->tiling_mode != I915_TILING_NONE;
280}
281
282static inline int 274static inline int
283__copy_to_user_swizzled(char __user *cpu_vaddr, 275__copy_to_user_swizzled(char __user *cpu_vaddr,
284 const char *gpu_vaddr, int gpu_offset, 276 const char *gpu_vaddr, int gpu_offset,
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index cedbfd7b3dfa..65f1d4f3f775 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -396,6 +396,18 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
396 /* we have to maintain this existing ABI... */ 396 /* we have to maintain this existing ABI... */
397 args->stride = obj->stride; 397 args->stride = obj->stride;
398 args->tiling_mode = obj->tiling_mode; 398 args->tiling_mode = obj->tiling_mode;
399
400 /* Try to preallocate memory required to save swizzling on put-pages */
401 if (i915_gem_object_needs_bit17_swizzle(obj)) {
402 if (obj->bit_17 == NULL) {
403 obj->bit_17 = kmalloc(BITS_TO_LONGS(obj->base.size >> PAGE_SHIFT) *
404 sizeof(long), GFP_KERNEL);
405 }
406 } else {
407 kfree(obj->bit_17);
408 obj->bit_17 = NULL;
409 }
410
399 drm_gem_object_unreference(&obj->base); 411 drm_gem_object_unreference(&obj->base);
400 mutex_unlock(&dev->struct_mutex); 412 mutex_unlock(&dev->struct_mutex);
401 413