diff options
author | Ben Widawsky <ben@bwidawsk.net> | 2011-04-25 15:11:50 -0400 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2011-05-10 16:56:47 -0400 |
commit | d1ebd816e6d7967c764f0cfa7d718f7c5cc7a8e4 (patch) | |
tree | 18857de30c385fa2a67fa3337c37806db876a603 /drivers/gpu | |
parent | fcca7926299944841569515da321bef9655b7703 (diff) |
drm/i915: forcewake struct mutex locking fixes
Found by the new strict checking for the mutex being held whilst
manipulating the forcewake status.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 9 |
2 files changed, 17 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 3b1147d9023a..9069f284495f 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -853,6 +853,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) | |||
853 | struct drm_info_node *node = (struct drm_info_node *) m->private; | 853 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
854 | struct drm_device *dev = node->minor->dev; | 854 | struct drm_device *dev = node->minor->dev; |
855 | drm_i915_private_t *dev_priv = dev->dev_private; | 855 | drm_i915_private_t *dev_priv = dev->dev_private; |
856 | int ret; | ||
856 | 857 | ||
857 | if (IS_GEN5(dev)) { | 858 | if (IS_GEN5(dev)) { |
858 | u16 rgvswctl = I915_READ16(MEMSWCTL); | 859 | u16 rgvswctl = I915_READ16(MEMSWCTL); |
@@ -874,6 +875,10 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) | |||
874 | int max_freq; | 875 | int max_freq; |
875 | 876 | ||
876 | /* RPSTAT1 is in the GT power well */ | 877 | /* RPSTAT1 is in the GT power well */ |
878 | ret = mutex_lock_interruptible(&dev->struct_mutex); | ||
879 | if (ret) | ||
880 | return ret; | ||
881 | |||
877 | gen6_gt_force_wake_get(dev_priv); | 882 | gen6_gt_force_wake_get(dev_priv); |
878 | 883 | ||
879 | rpstat = I915_READ(GEN6_RPSTAT1); | 884 | rpstat = I915_READ(GEN6_RPSTAT1); |
@@ -884,6 +889,9 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) | |||
884 | rpcurdown = I915_READ(GEN6_RP_CUR_DOWN); | 889 | rpcurdown = I915_READ(GEN6_RP_CUR_DOWN); |
885 | rpprevdown = I915_READ(GEN6_RP_PREV_DOWN); | 890 | rpprevdown = I915_READ(GEN6_RP_PREV_DOWN); |
886 | 891 | ||
892 | gen6_gt_force_wake_put(dev_priv); | ||
893 | mutex_unlock(&dev->struct_mutex); | ||
894 | |||
887 | seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); | 895 | seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); |
888 | seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat); | 896 | seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat); |
889 | seq_printf(m, "Render p-state ratio: %d\n", | 897 | seq_printf(m, "Render p-state ratio: %d\n", |
@@ -918,8 +926,6 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) | |||
918 | max_freq = rp_state_cap & 0xff; | 926 | max_freq = rp_state_cap & 0xff; |
919 | seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", | 927 | seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", |
920 | max_freq * 50); | 928 | max_freq * 50); |
921 | |||
922 | gen6_gt_force_wake_put(dev_priv); | ||
923 | } else { | 929 | } else { |
924 | seq_printf(m, "no P-state info available\n"); | 930 | seq_printf(m, "no P-state info available\n"); |
925 | } | 931 | } |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 220c3e0ea0a6..5504ff2a109d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -2585,7 +2585,11 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) | |||
2585 | ironlake_pch_enable(crtc); | 2585 | ironlake_pch_enable(crtc); |
2586 | 2586 | ||
2587 | intel_crtc_load_lut(crtc); | 2587 | intel_crtc_load_lut(crtc); |
2588 | |||
2589 | mutex_lock(&dev->struct_mutex); | ||
2588 | intel_update_fbc(dev); | 2590 | intel_update_fbc(dev); |
2591 | mutex_unlock(&dev->struct_mutex); | ||
2592 | |||
2589 | intel_crtc_update_cursor(crtc, true); | 2593 | intel_crtc_update_cursor(crtc, true); |
2590 | } | 2594 | } |
2591 | 2595 | ||
@@ -2681,8 +2685,11 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) | |||
2681 | 2685 | ||
2682 | intel_crtc->active = false; | 2686 | intel_crtc->active = false; |
2683 | intel_update_watermarks(dev); | 2687 | intel_update_watermarks(dev); |
2688 | |||
2689 | mutex_lock(&dev->struct_mutex); | ||
2684 | intel_update_fbc(dev); | 2690 | intel_update_fbc(dev); |
2685 | intel_clear_scanline_wait(dev); | 2691 | intel_clear_scanline_wait(dev); |
2692 | mutex_unlock(&dev->struct_mutex); | ||
2686 | } | 2693 | } |
2687 | 2694 | ||
2688 | static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) | 2695 | static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) |
@@ -6973,6 +6980,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) | |||
6973 | * userspace... | 6980 | * userspace... |
6974 | */ | 6981 | */ |
6975 | I915_WRITE(GEN6_RC_STATE, 0); | 6982 | I915_WRITE(GEN6_RC_STATE, 0); |
6983 | mutex_lock(&dev_priv->dev->struct_mutex); | ||
6976 | gen6_gt_force_wake_get(dev_priv); | 6984 | gen6_gt_force_wake_get(dev_priv); |
6977 | 6985 | ||
6978 | /* disable the counters and set deterministic thresholds */ | 6986 | /* disable the counters and set deterministic thresholds */ |
@@ -7075,6 +7083,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) | |||
7075 | I915_WRITE(GEN6_PMINTRMSK, 0); | 7083 | I915_WRITE(GEN6_PMINTRMSK, 0); |
7076 | 7084 | ||
7077 | gen6_gt_force_wake_put(dev_priv); | 7085 | gen6_gt_force_wake_put(dev_priv); |
7086 | mutex_unlock(&dev_priv->dev->struct_mutex); | ||
7078 | } | 7087 | } |
7079 | 7088 | ||
7080 | void intel_enable_clock_gating(struct drm_device *dev) | 7089 | void intel_enable_clock_gating(struct drm_device *dev) |