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authorMichel Dänzer <daenzer@vmware.com>2009-06-15 10:56:13 -0400
committerDave Airlie <airlied@redhat.com>2009-06-18 19:24:53 -0400
commit46f4b3eab73e621bc239bfa62ebdc44dcc0a877a (patch)
tree242528337269c59a967560b7141b87ff33150db9 /drivers/gpu
parent919f32f1df228723f66bf5c5aed23e0ab076b1a1 (diff)
drm/ttm: Add some powerpc cache flush code.
Optimise the powerpc flushing path for TTM. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/ttm/ttm_tt.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index c27ab3a877ad..0331fa74cd3f 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -68,7 +68,7 @@ static void ttm_tt_cache_flush_clflush(struct page *pages[],
68 ttm_tt_clflush_page(*pages++); 68 ttm_tt_clflush_page(*pages++);
69 mb(); 69 mb();
70} 70}
71#else 71#elif !defined(__powerpc__)
72static void ttm_tt_ipi_handler(void *null) 72static void ttm_tt_ipi_handler(void *null)
73{ 73{
74 ; 74 ;
@@ -83,6 +83,15 @@ void ttm_tt_cache_flush(struct page *pages[], unsigned long num_pages)
83 ttm_tt_cache_flush_clflush(pages, num_pages); 83 ttm_tt_cache_flush_clflush(pages, num_pages);
84 return; 84 return;
85 } 85 }
86#elif defined(__powerpc__)
87 unsigned long i;
88
89 for (i = 0; i < num_pages; ++i) {
90 if (pages[i]) {
91 unsigned long start = (unsigned long)page_address(pages[i]);
92 flush_dcache_range(start, start + PAGE_SIZE);
93 }
94 }
86#else 95#else
87 if (on_each_cpu(ttm_tt_ipi_handler, NULL, 1) != 0) 96 if (on_each_cpu(ttm_tt_ipi_handler, NULL, 1) != 0)
88 printk(KERN_ERR TTM_PFX 97 printk(KERN_ERR TTM_PFX