diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-05-15 16:22:11 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-05-15 16:22:11 -0400 |
commit | 40f293ff833f4054de880d105bda0dbb5e2468db (patch) | |
tree | 8ee903bd20476dd2a38e42b1e611f3c8d1142bb6 /drivers/gpu | |
parent | 8c21f34126222239450717b78dda0c4962d9ebfa (diff) | |
parent | 08d7b3d1edff84bd673d9e9ab36b5aa62e1ba903 (diff) |
Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:
drm/i915: Add new GET_PIPE_FROM_CRTC_ID ioctl.
drm/i915: Set HDMI hot plug interrupt enable for only the output in question.
drm/i915: Include 965GME pci ID in IS_I965GM(dev) to match UMS.
drm/i915: Use the GM45 VGA hotplug workaround on G45 as well.
drm/i915: ignore LVDS on intel graphics systems that lie about having it
drm/i915: sanity check IER at wait_request time
drm/i915: workaround IGD i2c bus issue in kernel side (v2)
drm/i915: Don't allow binding objects into the last page of the aperture.
drm/i915: save/restore fence registers across suspend/resume
drm/i915: x86 always has writeq. Add I915_READ64 for symmetry.
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 13 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 24 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_crt.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 31 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 17 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_i2c.c | 17 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 54 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_modes.c | 6 |
12 files changed, 165 insertions, 24 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 051134c56aef..53d544552625 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1011,8 +1011,16 @@ static int i915_load_modeset_init(struct drm_device *dev) | |||
1011 | /* Basic memrange allocator for stolen space (aka vram) */ | 1011 | /* Basic memrange allocator for stolen space (aka vram) */ |
1012 | drm_mm_init(&dev_priv->vram, 0, prealloc_size); | 1012 | drm_mm_init(&dev_priv->vram, 0, prealloc_size); |
1013 | 1013 | ||
1014 | /* Let GEM Manage from end of prealloc space to end of aperture */ | 1014 | /* Let GEM Manage from end of prealloc space to end of aperture. |
1015 | i915_gem_do_init(dev, prealloc_size, agp_size); | 1015 | * |
1016 | * However, leave one page at the end still bound to the scratch page. | ||
1017 | * There are a number of places where the hardware apparently | ||
1018 | * prefetches past the end of the object, and we've seen multiple | ||
1019 | * hangs with the GPU head pointer stuck in a batchbuffer bound | ||
1020 | * at the last page of the aperture. One page should be enough to | ||
1021 | * keep any prefetching inside of the aperture. | ||
1022 | */ | ||
1023 | i915_gem_do_init(dev, prealloc_size, agp_size - 4096); | ||
1016 | 1024 | ||
1017 | ret = i915_gem_init_ringbuffer(dev); | 1025 | ret = i915_gem_init_ringbuffer(dev); |
1018 | if (ret) | 1026 | if (ret) |
@@ -1350,6 +1358,7 @@ struct drm_ioctl_desc i915_ioctls[] = { | |||
1350 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), | 1358 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), |
1351 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), | 1359 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), |
1352 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), | 1360 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), |
1361 | DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0), | ||
1353 | }; | 1362 | }; |
1354 | 1363 | ||
1355 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); | 1364 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 25065923b8a8..9b149fe824c3 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -283,6 +283,7 @@ typedef struct drm_i915_private { | |||
283 | u8 saveAR[21]; | 283 | u8 saveAR[21]; |
284 | u8 saveDACMASK; | 284 | u8 saveDACMASK; |
285 | u8 saveCR[37]; | 285 | u8 saveCR[37]; |
286 | uint64_t saveFENCE[16]; | ||
286 | 287 | ||
287 | struct { | 288 | struct { |
288 | struct drm_mm gtt_space; | 289 | struct drm_mm gtt_space; |
@@ -705,13 +706,8 @@ extern void intel_modeset_cleanup(struct drm_device *dev); | |||
705 | #define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg)) | 706 | #define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg)) |
706 | #define I915_READ8(reg) readb(dev_priv->regs + (reg)) | 707 | #define I915_READ8(reg) readb(dev_priv->regs + (reg)) |
707 | #define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg)) | 708 | #define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg)) |
708 | #ifdef writeq | ||
709 | #define I915_WRITE64(reg, val) writeq(val, dev_priv->regs + (reg)) | 709 | #define I915_WRITE64(reg, val) writeq(val, dev_priv->regs + (reg)) |
710 | #else | 710 | #define I915_READ64(reg) readq(dev_priv->regs + (reg)) |
711 | #define I915_WRITE64(reg, val) (writel(val, dev_priv->regs + (reg)), \ | ||
712 | writel(upper_32_bits(val), dev_priv->regs + \ | ||
713 | (reg) + 4)) | ||
714 | #endif | ||
715 | #define POSTING_READ(reg) (void)I915_READ(reg) | 711 | #define POSTING_READ(reg) (void)I915_READ(reg) |
716 | 712 | ||
717 | #define I915_VERBOSE 0 | 713 | #define I915_VERBOSE 0 |
@@ -790,7 +786,8 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); | |||
790 | (dev)->pci_device == 0x2E22 || \ | 786 | (dev)->pci_device == 0x2E22 || \ |
791 | (dev)->pci_device == 0x2E32) | 787 | (dev)->pci_device == 0x2E32) |
792 | 788 | ||
793 | #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02) | 789 | #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \ |
790 | (dev)->pci_device == 0x2A12) | ||
794 | 791 | ||
795 | #define IS_GM45(dev) ((dev)->pci_device == 0x2A42) | 792 | #define IS_GM45(dev) ((dev)->pci_device == 0x2A42) |
796 | 793 | ||
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index ee896d91c5bc..b189b49c7602 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -1691,11 +1691,20 @@ static int | |||
1691 | i915_wait_request(struct drm_device *dev, uint32_t seqno) | 1691 | i915_wait_request(struct drm_device *dev, uint32_t seqno) |
1692 | { | 1692 | { |
1693 | drm_i915_private_t *dev_priv = dev->dev_private; | 1693 | drm_i915_private_t *dev_priv = dev->dev_private; |
1694 | u32 ier; | ||
1694 | int ret = 0; | 1695 | int ret = 0; |
1695 | 1696 | ||
1696 | BUG_ON(seqno == 0); | 1697 | BUG_ON(seqno == 0); |
1697 | 1698 | ||
1698 | if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) { | 1699 | if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) { |
1700 | ier = I915_READ(IER); | ||
1701 | if (!ier) { | ||
1702 | DRM_ERROR("something (likely vbetool) disabled " | ||
1703 | "interrupts, re-enabling\n"); | ||
1704 | i915_driver_irq_preinstall(dev); | ||
1705 | i915_driver_irq_postinstall(dev); | ||
1706 | } | ||
1707 | |||
1699 | dev_priv->mm.waiting_gem_seqno = seqno; | 1708 | dev_priv->mm.waiting_gem_seqno = seqno; |
1700 | i915_user_irq_get(dev); | 1709 | i915_user_irq_get(dev); |
1701 | ret = wait_event_interruptible(dev_priv->irq_queue, | 1710 | ret = wait_event_interruptible(dev_priv->irq_queue, |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 521194732266..15da44cf21b1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -526,6 +526,7 @@ | |||
526 | #define DPLLA_INPUT_BUFFER_ENABLE (1 << 0) | 526 | #define DPLLA_INPUT_BUFFER_ENABLE (1 << 0) |
527 | #define D_STATE 0x6104 | 527 | #define D_STATE 0x6104 |
528 | #define CG_2D_DIS 0x6200 | 528 | #define CG_2D_DIS 0x6200 |
529 | #define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24) | ||
529 | #define CG_3D_DIS 0x6204 | 530 | #define CG_3D_DIS 0x6204 |
530 | 531 | ||
531 | /* | 532 | /* |
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index d669cc2b42c0..ce8a21344a71 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
@@ -349,6 +349,18 @@ int i915_save_state(struct drm_device *dev) | |||
349 | for (i = 0; i < 3; i++) | 349 | for (i = 0; i < 3; i++) |
350 | dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2)); | 350 | dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2)); |
351 | 351 | ||
352 | /* Fences */ | ||
353 | if (IS_I965G(dev)) { | ||
354 | for (i = 0; i < 16; i++) | ||
355 | dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); | ||
356 | } else { | ||
357 | for (i = 0; i < 8; i++) | ||
358 | dev_priv->saveFENCE[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); | ||
359 | |||
360 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) | ||
361 | for (i = 0; i < 8; i++) | ||
362 | dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); | ||
363 | } | ||
352 | i915_save_vga(dev); | 364 | i915_save_vga(dev); |
353 | 365 | ||
354 | return 0; | 366 | return 0; |
@@ -371,6 +383,18 @@ int i915_restore_state(struct drm_device *dev) | |||
371 | /* Display arbitration */ | 383 | /* Display arbitration */ |
372 | I915_WRITE(DSPARB, dev_priv->saveDSPARB); | 384 | I915_WRITE(DSPARB, dev_priv->saveDSPARB); |
373 | 385 | ||
386 | /* Fences */ | ||
387 | if (IS_I965G(dev)) { | ||
388 | for (i = 0; i < 16; i++) | ||
389 | I915_WRITE64(FENCE_REG_965_0 + (i * 8), dev_priv->saveFENCE[i]); | ||
390 | } else { | ||
391 | for (i = 0; i < 8; i++) | ||
392 | I915_WRITE(FENCE_REG_830_0 + (i * 4), dev_priv->saveFENCE[i]); | ||
393 | if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) | ||
394 | for (i = 0; i < 8; i++) | ||
395 | I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]); | ||
396 | } | ||
397 | |||
374 | /* Pipe & plane A info */ | 398 | /* Pipe & plane A info */ |
375 | /* Prime the clock */ | 399 | /* Prime the clock */ |
376 | if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { | 400 | if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { |
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 9bdd959260a5..19148c3df637 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -161,7 +161,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector) | |||
161 | hotplug_en &= CRT_FORCE_HOTPLUG_MASK; | 161 | hotplug_en &= CRT_FORCE_HOTPLUG_MASK; |
162 | hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; | 162 | hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; |
163 | 163 | ||
164 | if (IS_GM45(dev)) | 164 | if (IS_G4X(dev)) |
165 | hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64; | 165 | hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64; |
166 | 166 | ||
167 | hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50; | 167 | hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50; |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index bdcda36953b0..3387cf32f385 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1804,6 +1804,37 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) | |||
1804 | } | 1804 | } |
1805 | } | 1805 | } |
1806 | 1806 | ||
1807 | int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, | ||
1808 | struct drm_file *file_priv) | ||
1809 | { | ||
1810 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
1811 | struct drm_i915_get_pipe_from_crtc_id *pipe_from_crtc_id = data; | ||
1812 | struct drm_crtc *crtc = NULL; | ||
1813 | int pipe = -1; | ||
1814 | |||
1815 | if (!dev_priv) { | ||
1816 | DRM_ERROR("called with no initialization\n"); | ||
1817 | return -EINVAL; | ||
1818 | } | ||
1819 | |||
1820 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | ||
1821 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
1822 | if (crtc->base.id == pipe_from_crtc_id->crtc_id) { | ||
1823 | pipe = intel_crtc->pipe; | ||
1824 | break; | ||
1825 | } | ||
1826 | } | ||
1827 | |||
1828 | if (pipe == -1) { | ||
1829 | DRM_ERROR("no such CRTC id\n"); | ||
1830 | return -EINVAL; | ||
1831 | } | ||
1832 | |||
1833 | pipe_from_crtc_id->pipe = pipe; | ||
1834 | |||
1835 | return 0; | ||
1836 | } | ||
1837 | |||
1807 | struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe) | 1838 | struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe) |
1808 | { | 1839 | { |
1809 | struct drm_crtc *crtc = NULL; | 1840 | struct drm_crtc *crtc = NULL; |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 957daef8edff..cd4b9c5f715e 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -109,7 +109,7 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg, | |||
109 | void intel_i2c_destroy(struct intel_i2c_chan *chan); | 109 | void intel_i2c_destroy(struct intel_i2c_chan *chan); |
110 | int intel_ddc_get_modes(struct intel_output *intel_output); | 110 | int intel_ddc_get_modes(struct intel_output *intel_output); |
111 | extern bool intel_ddc_probe(struct intel_output *intel_output); | 111 | extern bool intel_ddc_probe(struct intel_output *intel_output); |
112 | 112 | void intel_i2c_quirk_set(struct drm_device *dev, bool enable); | |
113 | extern void intel_crt_init(struct drm_device *dev); | 113 | extern void intel_crt_init(struct drm_device *dev); |
114 | extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg); | 114 | extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg); |
115 | extern bool intel_sdvo_init(struct drm_device *dev, int output_device); | 115 | extern bool intel_sdvo_init(struct drm_device *dev, int output_device); |
@@ -125,6 +125,8 @@ extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector); | |||
125 | 125 | ||
126 | extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, | 126 | extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, |
127 | struct drm_crtc *crtc); | 127 | struct drm_crtc *crtc); |
128 | int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, | ||
129 | struct drm_file *file_priv); | ||
128 | extern void intel_wait_for_vblank(struct drm_device *dev); | 130 | extern void intel_wait_for_vblank(struct drm_device *dev); |
129 | extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe); | 131 | extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe); |
130 | extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | 132 | extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, |
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 550374225388..d0983bb93a18 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -155,11 +155,18 @@ intel_hdmi_detect(struct drm_connector *connector) | |||
155 | 155 | ||
156 | temp = I915_READ(PORT_HOTPLUG_EN); | 156 | temp = I915_READ(PORT_HOTPLUG_EN); |
157 | 157 | ||
158 | I915_WRITE(PORT_HOTPLUG_EN, | 158 | switch (hdmi_priv->sdvox_reg) { |
159 | temp | | 159 | case SDVOB: |
160 | HDMIB_HOTPLUG_INT_EN | | 160 | temp |= HDMIB_HOTPLUG_INT_EN; |
161 | HDMIC_HOTPLUG_INT_EN | | 161 | break; |
162 | HDMID_HOTPLUG_INT_EN); | 162 | case SDVOC: |
163 | temp |= HDMIC_HOTPLUG_INT_EN; | ||
164 | break; | ||
165 | default: | ||
166 | return connector_status_unknown; | ||
167 | } | ||
168 | |||
169 | I915_WRITE(PORT_HOTPLUG_EN, temp); | ||
163 | 170 | ||
164 | POSTING_READ(PORT_HOTPLUG_EN); | 171 | POSTING_READ(PORT_HOTPLUG_EN); |
165 | 172 | ||
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 5ee9d4c25753..f7061f68d050 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c | |||
@@ -34,6 +34,21 @@ | |||
34 | #include "i915_drm.h" | 34 | #include "i915_drm.h" |
35 | #include "i915_drv.h" | 35 | #include "i915_drv.h" |
36 | 36 | ||
37 | void intel_i2c_quirk_set(struct drm_device *dev, bool enable) | ||
38 | { | ||
39 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
40 | |||
41 | /* When using bit bashing for I2C, this bit needs to be set to 1 */ | ||
42 | if (!IS_IGD(dev)) | ||
43 | return; | ||
44 | if (enable) | ||
45 | I915_WRITE(CG_2D_DIS, | ||
46 | I915_READ(CG_2D_DIS) | DPCUNIT_CLOCK_GATE_DISABLE); | ||
47 | else | ||
48 | I915_WRITE(CG_2D_DIS, | ||
49 | I915_READ(CG_2D_DIS) & (~DPCUNIT_CLOCK_GATE_DISABLE)); | ||
50 | } | ||
51 | |||
37 | /* | 52 | /* |
38 | * Intel GPIO access functions | 53 | * Intel GPIO access functions |
39 | */ | 54 | */ |
@@ -153,8 +168,10 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg, | |||
153 | goto out_free; | 168 | goto out_free; |
154 | 169 | ||
155 | /* JJJ: raise SCL and SDA? */ | 170 | /* JJJ: raise SCL and SDA? */ |
171 | intel_i2c_quirk_set(dev, true); | ||
156 | set_data(chan, 1); | 172 | set_data(chan, 1); |
157 | set_clock(chan, 1); | 173 | set_clock(chan, 1); |
174 | intel_i2c_quirk_set(dev, false); | ||
158 | udelay(20); | 175 | udelay(20); |
159 | 176 | ||
160 | return chan; | 177 | return chan; |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 6619f26e46a5..439a86514993 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -384,7 +384,51 @@ static const struct drm_encoder_funcs intel_lvds_enc_funcs = { | |||
384 | .destroy = intel_lvds_enc_destroy, | 384 | .destroy = intel_lvds_enc_destroy, |
385 | }; | 385 | }; |
386 | 386 | ||
387 | static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) | ||
388 | { | ||
389 | DRM_DEBUG("Skipping LVDS initialization for %s\n", id->ident); | ||
390 | return 1; | ||
391 | } | ||
387 | 392 | ||
393 | /* These systems claim to have LVDS, but really don't */ | ||
394 | static const struct dmi_system_id __initdata intel_no_lvds[] = { | ||
395 | { | ||
396 | .callback = intel_no_lvds_dmi_callback, | ||
397 | .ident = "Apple Mac Mini (Core series)", | ||
398 | .matches = { | ||
399 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | ||
400 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), | ||
401 | }, | ||
402 | }, | ||
403 | { | ||
404 | .callback = intel_no_lvds_dmi_callback, | ||
405 | .ident = "Apple Mac Mini (Core 2 series)", | ||
406 | .matches = { | ||
407 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | ||
408 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), | ||
409 | }, | ||
410 | }, | ||
411 | { | ||
412 | .callback = intel_no_lvds_dmi_callback, | ||
413 | .ident = "MSI IM-945GSE-A", | ||
414 | .matches = { | ||
415 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), | ||
416 | DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), | ||
417 | }, | ||
418 | }, | ||
419 | { | ||
420 | .callback = intel_no_lvds_dmi_callback, | ||
421 | .ident = "Dell Studio Hybrid", | ||
422 | .matches = { | ||
423 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | ||
424 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), | ||
425 | }, | ||
426 | }, | ||
427 | |||
428 | /* FIXME: add a check for the Aopen Mini PC */ | ||
429 | |||
430 | { } /* terminating entry */ | ||
431 | }; | ||
388 | 432 | ||
389 | /** | 433 | /** |
390 | * intel_lvds_init - setup LVDS connectors on this device | 434 | * intel_lvds_init - setup LVDS connectors on this device |
@@ -404,15 +448,9 @@ void intel_lvds_init(struct drm_device *dev) | |||
404 | u32 lvds; | 448 | u32 lvds; |
405 | int pipe; | 449 | int pipe; |
406 | 450 | ||
407 | /* Blacklist machines that we know falsely report LVDS. */ | 451 | /* Skip init on machines we know falsely report LVDS */ |
408 | /* FIXME: add a check for the Aopen Mini PC */ | 452 | if (dmi_check_system(intel_no_lvds)) |
409 | |||
410 | /* Apple Mac Mini Core Duo and Mac Mini Core 2 Duo */ | ||
411 | if(dmi_match(DMI_PRODUCT_NAME, "Macmini1,1") || | ||
412 | dmi_match(DMI_PRODUCT_NAME, "Macmini2,1")) { | ||
413 | DRM_DEBUG("Skipping LVDS initialization for Apple Mac Mini\n"); | ||
414 | return; | 453 | return; |
415 | } | ||
416 | 454 | ||
417 | intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL); | 455 | intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL); |
418 | if (!intel_output) { | 456 | if (!intel_output) { |
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c index 07d7ec976168..e0910fefce87 100644 --- a/drivers/gpu/drm/i915/intel_modes.c +++ b/drivers/gpu/drm/i915/intel_modes.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/fb.h> | 27 | #include <linux/fb.h> |
28 | #include "drmP.h" | 28 | #include "drmP.h" |
29 | #include "intel_drv.h" | 29 | #include "intel_drv.h" |
30 | #include "i915_drv.h" | ||
30 | 31 | ||
31 | /** | 32 | /** |
32 | * intel_ddc_probe | 33 | * intel_ddc_probe |
@@ -52,7 +53,10 @@ bool intel_ddc_probe(struct intel_output *intel_output) | |||
52 | } | 53 | } |
53 | }; | 54 | }; |
54 | 55 | ||
56 | intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true); | ||
55 | ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2); | 57 | ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2); |
58 | intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false); | ||
59 | |||
56 | if (ret == 2) | 60 | if (ret == 2) |
57 | return true; | 61 | return true; |
58 | 62 | ||
@@ -70,8 +74,10 @@ int intel_ddc_get_modes(struct intel_output *intel_output) | |||
70 | struct edid *edid; | 74 | struct edid *edid; |
71 | int ret = 0; | 75 | int ret = 0; |
72 | 76 | ||
77 | intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true); | ||
73 | edid = drm_get_edid(&intel_output->base, | 78 | edid = drm_get_edid(&intel_output->base, |
74 | &intel_output->ddc_bus->adapter); | 79 | &intel_output->ddc_bus->adapter); |
80 | intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false); | ||
75 | if (edid) { | 81 | if (edid) { |
76 | drm_mode_connector_update_edid_property(&intel_output->base, | 82 | drm_mode_connector_update_edid_property(&intel_output->base, |
77 | edid); | 83 | edid); |