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authorZhao Yakui <yakui.zhao@intel.com>2010-01-06 09:05:57 -0500
committerEric Anholt <eric@anholt.net>2010-01-07 13:26:45 -0500
commita59e385eacd920222756a23c113444fe3063cf81 (patch)
tree06e15264708e55578efeabf608ffe6805564446d /drivers/gpu
parentddc9003c357d1ce10be6ec91bdb8df8ea836087d (diff)
drm/i915: Fix Ironlake M/N/P ranges to match the spec
Without this fix, some modes couldn't find appropriate clocks. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Matthew Garrett <mjg@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0cf44d6e9deb..42e8c031c2ca 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -241,11 +241,11 @@ struct intel_limit {
241#define IRONLAKE_VCO_MIN 1760000 241#define IRONLAKE_VCO_MIN 1760000
242#define IRONLAKE_VCO_MAX 3510000 242#define IRONLAKE_VCO_MAX 3510000
243#define IRONLAKE_N_MIN 1 243#define IRONLAKE_N_MIN 1
244#define IRONLAKE_N_MAX 5 244#define IRONLAKE_N_MAX 6
245#define IRONLAKE_M_MIN 79 245#define IRONLAKE_M_MIN 79
246#define IRONLAKE_M_MAX 118 246#define IRONLAKE_M_MAX 127
247#define IRONLAKE_M1_MIN 12 247#define IRONLAKE_M1_MIN 12
248#define IRONLAKE_M1_MAX 23 248#define IRONLAKE_M1_MAX 22
249#define IRONLAKE_M2_MIN 5 249#define IRONLAKE_M2_MIN 5
250#define IRONLAKE_M2_MAX 9 250#define IRONLAKE_M2_MAX 9
251#define IRONLAKE_P_SDVO_DAC_MIN 5 251#define IRONLAKE_P_SDVO_DAC_MIN 5