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authorAlex Deucher <alexdeucher@gmail.com>2008-10-27 17:48:34 -0400
committerDave Airlie <airlied@redhat.com>2008-10-27 17:48:34 -0400
commit4e270e9b8a9d246290f3901f1fb6c5efdb734ddf (patch)
tree5fd42dd52d6268ef8f91e4fd5f388d2c506b1dce /drivers/gpu
parent65e082c9a33a6e9f24e9a713a7d38d11206d3c3d (diff)
drm/radeon: fixup further bus mastering confusion.
rs400/480 are like previous chips not like rs6xx chips. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/radeon_cp.c15
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h12
2 files changed, 14 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 59a2132a8f57..073894824e6b 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -653,15 +653,16 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
653 RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7); 653 RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
654 654
655 /* Turn on bus mastering */ 655 /* Turn on bus mastering */
656 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) || 656 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
657 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
658 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { 657 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
659 /* rs400, rs690/rs740 */ 658 /* rs600/rs690/rs740 */
660 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS; 659 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
661 RADEON_WRITE(RADEON_BUS_CNTL, tmp); 660 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
662 } else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) || 661 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
663 ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) { 662 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
664 /* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ 663 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
664 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
665 /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
665 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS; 666 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
666 RADEON_WRITE(RADEON_BUS_CNTL, tmp); 667 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
667 } /* PCIE cards appears to not need this */ 668 } /* PCIE cards appears to not need this */
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 4dbb813910c3..02f5575ba395 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
447 * handling, not bus mastering itself. 447 * handling, not bus mastering itself.
448 */ 448 */
449#define RADEON_BUS_CNTL 0x0030 449#define RADEON_BUS_CNTL 0x0030
450/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ 450/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
451# define RADEON_BUS_MASTER_DIS (1 << 6) 451# define RADEON_BUS_MASTER_DIS (1 << 6)
452/* rs400, rs690/rs740 */ 452/* rs600/rs690/rs740 */
453# define RS400_BUS_MASTER_DIS (1 << 14) 453# define RS600_BUS_MASTER_DIS (1 << 14)
454# define RS400_MSI_REARM (1 << 20) 454# define RS600_MSI_REARM (1 << 20)
455/* see RS480_MSI_REARM in AIC_CNTL for rs480 */ 455/* see RS400_MSI_REARM in AIC_CNTL for rs480 */
456 456
457#define RADEON_BUS_CNTL1 0x0034 457#define RADEON_BUS_CNTL1 0x0034
458# define RADEON_PMI_BM_DIS (1 << 2) 458# define RADEON_PMI_BM_DIS (1 << 2)
@@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
937 937
938#define RADEON_AIC_CNTL 0x01d0 938#define RADEON_AIC_CNTL 0x01d0
939# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) 939# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
940# define RS480_MSI_REARM (1 << 3) 940# define RS400_MSI_REARM (1 << 3)
941#define RADEON_AIC_STAT 0x01d4 941#define RADEON_AIC_STAT 0x01d4
942#define RADEON_AIC_PT_BASE 0x01d8 942#define RADEON_AIC_PT_BASE 0x01d8
943#define RADEON_AIC_LO_ADDR 0x01dc 943#define RADEON_AIC_LO_ADDR 0x01dc