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authorMichel Dänzer <daenzer@vmware.com>2009-06-23 10:12:55 -0400
committerDave Airlie <airlied@redhat.com>2009-07-15 03:13:17 -0400
commit61b576dbbe6a19d102c025ebc102a0749e2d3c80 (patch)
tree6f80871a55aa8eb46e085d35ddd87bc448eb4ef6 /drivers/gpu
parent77bd36f014bc5a3f28507a4e86a81b2b3d2439c3 (diff)
drm/radeon: Endianness fixes for radeondrmfb.
For now handle it via r/g/b offsets and disallow 16 bpp modes on big endian machines. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c53
1 files changed, 50 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index 9e8f191eb64a..260870a29d83 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -101,9 +101,10 @@ static int radeonfb_setcolreg(unsigned regno,
101 break; 101 break;
102 case 24: 102 case 24:
103 case 32: 103 case 32:
104 fb->pseudo_palette[regno] = ((red & 0xff00) << 8) | 104 fb->pseudo_palette[regno] =
105 (green & 0xff00) | 105 (((red >> 8) & 0xff) << info->var.red.offset) |
106 ((blue & 0xff00) >> 8); 106 (((green >> 8) & 0xff) << info->var.green.offset) |
107 (((blue >> 8) & 0xff) << info->var.blue.offset);
107 break; 108 break;
108 } 109 }
109 } 110 }
@@ -154,6 +155,7 @@ static int radeonfb_check_var(struct fb_var_screeninfo *var,
154 var->transp.length = 0; 155 var->transp.length = 0;
155 var->transp.offset = 0; 156 var->transp.offset = 0;
156 break; 157 break;
158#ifdef __LITTLE_ENDIAN
157 case 15: 159 case 15:
158 var->red.offset = 10; 160 var->red.offset = 10;
159 var->green.offset = 5; 161 var->green.offset = 5;
@@ -194,6 +196,28 @@ static int radeonfb_check_var(struct fb_var_screeninfo *var,
194 var->transp.length = 8; 196 var->transp.length = 8;
195 var->transp.offset = 24; 197 var->transp.offset = 24;
196 break; 198 break;
199#else
200 case 24:
201 var->red.offset = 8;
202 var->green.offset = 16;
203 var->blue.offset = 24;
204 var->red.length = 8;
205 var->green.length = 8;
206 var->blue.length = 8;
207 var->transp.length = 0;
208 var->transp.offset = 0;
209 break;
210 case 32:
211 var->red.offset = 8;
212 var->green.offset = 16;
213 var->blue.offset = 24;
214 var->red.length = 8;
215 var->green.length = 8;
216 var->blue.length = 8;
217 var->transp.length = 8;
218 var->transp.offset = 0;
219 break;
220#endif
197 default: 221 default:
198 return -EINVAL; 222 return -EINVAL;
199 } 223 }
@@ -600,6 +624,7 @@ int radeonfb_create(struct radeon_device *rdev,
600 info->var.transp.offset = 0; 624 info->var.transp.offset = 0;
601 info->var.transp.length = 0; 625 info->var.transp.length = 0;
602 break; 626 break;
627#ifdef __LITTLE_ENDIAN
603 case 15: 628 case 15:
604 info->var.red.offset = 10; 629 info->var.red.offset = 10;
605 info->var.green.offset = 5; 630 info->var.green.offset = 5;
@@ -639,7 +664,29 @@ int radeonfb_create(struct radeon_device *rdev,
639 info->var.transp.offset = 24; 664 info->var.transp.offset = 24;
640 info->var.transp.length = 8; 665 info->var.transp.length = 8;
641 break; 666 break;
667#else
668 case 24:
669 info->var.red.offset = 8;
670 info->var.green.offset = 16;
671 info->var.blue.offset = 24;
672 info->var.red.length = 8;
673 info->var.green.length = 8;
674 info->var.blue.length = 8;
675 info->var.transp.offset = 0;
676 info->var.transp.length = 0;
677 break;
678 case 32:
679 info->var.red.offset = 8;
680 info->var.green.offset = 16;
681 info->var.blue.offset = 24;
682 info->var.red.length = 8;
683 info->var.green.length = 8;
684 info->var.blue.length = 8;
685 info->var.transp.offset = 0;
686 info->var.transp.length = 8;
687 break;
642 default: 688 default:
689#endif
643 break; 690 break;
644 } 691 }
645 692