Merge branch 'kprobes-test' of git://git.yxit.co.uk/linux into devel-stable

12 files changed, 111 insertions, 28 deletions

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 82db18506662..fe738f05309b 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -499,6 +499,7 @@ void drm_connector_cleanup(struct drm_connector *connector)
         mutex_lock(&dev->mode_config.mutex);
         drm_mode_object_put(dev, &connector->base);
         list_del(&connector->head);
+        dev->mode_config.num_connector--;
         mutex_unlock(&dev->mode_config.mutex);
 }
 EXPORT_SYMBOL(drm_connector_cleanup);
@@ -529,6 +530,7 @@ void drm_encoder_cleanup(struct drm_encoder *encoder)
         mutex_lock(&dev->mode_config.mutex);
         drm_mode_object_put(dev, &encoder->base);
         list_del(&encoder->head);
+        dev->mode_config.num_encoder--;
         mutex_unlock(&dev->mode_config.mutex);
 }
 EXPORT_SYMBOL(drm_encoder_cleanup);
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 802b61ac3139..f7c6854eb4dd 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -256,7 +256,6 @@ int drm_fb_helper_panic(struct notifier_block *n, unsigned long ununsed,
 {
         printk(KERN_ERR "panic occurred, switching back to text console\n");
         return drm_fb_helper_force_kernel_mode();
-        return 0;
 }
 EXPORT_SYMBOL(drm_fb_helper_panic);
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 8d02d875376d..c919cfc8f2fd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -530,7 +530,8 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
                 nouveau_gpuobj_ref(NULL, &obj);
                 if (ret)
                         return ret;
-        } else {
+        } else
+        if (USE_SEMA(dev)) {
                 /* map fence bo into channel's vm */
                 ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm,
                                          &chan->fence.vma);
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
index c444cadbf849..2706cb3d871a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
@@ -37,8 +37,11 @@ nouveau_sgdma_populate(struct ttm_backend *be, unsigned long num_pages,
                 return -ENOMEM;
 
         nvbe->ttm_alloced = kmalloc(sizeof(bool) * num_pages, GFP_KERNEL);
-        if (!nvbe->ttm_alloced)
+        if (!nvbe->ttm_alloced) {
+                kfree(nvbe->pages);
+                nvbe->pages = NULL;
                 return -ENOMEM;
+        }
 
         nvbe->nr_pages = 0;
         while (num_pages--) {
@@ -126,7 +129,7 @@ nv04_sgdma_bind(struct ttm_backend *be, struct ttm_mem_reg *mem)
 
                 for (j = 0; j < PAGE_SIZE / NV_CTXDMA_PAGE_SIZE; j++, pte++) {
                         nv_wo32(gpuobj, (pte * 4) + 0, offset_l | 3);
-                        dma_offset += NV_CTXDMA_PAGE_SIZE;
+                        offset_l += NV_CTXDMA_PAGE_SIZE;
                 }
         }
 
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index 118261d4927a..5e45398a9e2d 100644
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -781,11 +781,20 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,
         struct drm_device *dev = crtc->dev;
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index];
-        struct drm_framebuffer *drm_fb = nv_crtc->base.fb;
-        struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
+        struct drm_framebuffer *drm_fb;
+        struct nouveau_framebuffer *fb;
         int arb_burst, arb_lwm;
         int ret;
 
+        NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
+
+        /* no fb bound */
+        if (!atomic && !crtc->fb) {
+                NV_DEBUG_KMS(dev, "No FB bound\n");
+                return 0;
+        }
+
+
         /* If atomic, we want to switch to the fb we were passed, so
          * now we update pointers to do that.  (We don't pin; just
          * assume we're already pinned and update the base address.)
@@ -794,6 +803,8 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,
                 drm_fb = passed_fb;
                 fb = nouveau_framebuffer(passed_fb);
         } else {
+                drm_fb = crtc->fb;
+                fb = nouveau_framebuffer(crtc->fb);
                 /* If not atomic, we can go ahead and pin, and unpin the
                  * old fb we were passed.
                  */
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
index 46ad59ea2185..5d989073ba6e 100644
--- a/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -519,12 +519,18 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,
         struct drm_device *dev = nv_crtc->base.dev;
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nouveau_channel *evo = nv50_display(dev)->master;
-        struct drm_framebuffer *drm_fb = nv_crtc->base.fb;
-        struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
+        struct drm_framebuffer *drm_fb;
+        struct nouveau_framebuffer *fb;
         int ret;
 
         NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
 
+        /* no fb bound */
+        if (!atomic && !crtc->fb) {
+                NV_DEBUG_KMS(dev, "No FB bound\n");
+                return 0;
+        }
+
         /* If atomic, we want to switch to the fb we were passed, so
          * now we update pointers to do that.  (We don't pin; just
          * assume we're already pinned and update the base address.)
@@ -533,6 +539,8 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,
                 drm_fb = passed_fb;
                 fb = nouveau_framebuffer(passed_fb);
         } else {
+                drm_fb = crtc->fb;
+                fb = nouveau_framebuffer(crtc->fb);
                 /* If not atomic, we can go ahead and pin, and unpin the
                  * old fb we were passed.
                  */
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index fb5fa0898868..dc0a5b56c81a 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -41,6 +41,31 @@ static void evergreen_gpu_init(struct radeon_device *rdev);
 void evergreen_fini(struct radeon_device *rdev);
 static void evergreen_pcie_gen2_enable(struct radeon_device *rdev);
 
+void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
+{
+        u16 ctl, v;
+        int cap, err;
+
+        cap = pci_pcie_cap(rdev->pdev);
+        if (!cap)
+                return;
+
+        err = pci_read_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, &ctl);
+        if (err)
+                return;
+
+        v = (ctl & PCI_EXP_DEVCTL_READRQ) >> 12;
+
+        /* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it
+         * to avoid hangs or perfomance issues
+         */
+        if ((v == 0) || (v == 6) || (v == 7)) {
+                ctl &= ~PCI_EXP_DEVCTL_READRQ;
+                ctl |= (2 << 12);
+                pci_write_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, ctl);
+        }
+}
+
 void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc)
 {
         /* enable the pflip int */
@@ -1357,6 +1382,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
                                  SOFT_RESET_PA |
                                  SOFT_RESET_SH |
                                  SOFT_RESET_VGT |
+                                 SOFT_RESET_SPI |
                                  SOFT_RESET_SX));
         RREG32(GRBM_SOFT_RESET);
         mdelay(15);
@@ -1862,6 +1888,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
 
         WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
 
+        evergreen_fix_pci_max_read_req_size(rdev);
+
         cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & ~2;
 
         cc_gc_shader_pipe_config |=
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 44c4750f4518..cbf57d75d925 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -39,6 +39,7 @@ extern int evergreen_mc_wait_for_idle(struct radeon_device *rdev);
 extern void evergreen_mc_program(struct radeon_device *rdev);
 extern void evergreen_irq_suspend(struct radeon_device *rdev);
 extern int evergreen_mc_init(struct radeon_device *rdev);
+extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev);
 
 #define EVERGREEN_PFP_UCODE_SIZE 1120
 #define EVERGREEN_PM4_UCODE_SIZE 1376
@@ -669,6 +670,8 @@ static void cayman_gpu_init(struct radeon_device *rdev)
 
         WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
 
+        evergreen_fix_pci_max_read_req_size(rdev);
+
         mc_shared_chmap = RREG32(MC_SHARED_CHMAP);
         mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);
 
@@ -1159,6 +1162,7 @@ int cayman_cp_resume(struct radeon_device *rdev)
                                  SOFT_RESET_PA |
                                  SOFT_RESET_SH |
                                  SOFT_RESET_VGT |
+                                 SOFT_RESET_SPI |
                                  SOFT_RESET_SX));
         RREG32(GRBM_SOFT_RESET);
         mdelay(15);
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index dcd0863e31ae..b6e18c8db9f5 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -219,6 +219,9 @@ void radeon_get_clock_info(struct drm_device *dev)
                 } else {
                         DRM_INFO("Using generic clock info\n");
 
+                        /* may need to be per card */
+                        rdev->clock.max_pixel_clock = 35000;
+
                         if (rdev->flags & RADEON_IS_IGP) {
                                 p1pll->reference_freq = 1432;
                                 p2pll->reference_freq = 1432;
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index e0138b674aca..63675241c7ff 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -3298,6 +3298,14 @@ void radeon_combios_asic_init(struct drm_device *dev)
             rdev->pdev->subsystem_device == 0x30a4)
                 return;
 
+        /* quirk for rs4xx Compaq Presario V5245EU laptop to make it resume
+         * - it hangs on resume inside the dynclk 1 table.
+         */
+        if (rdev->family == CHIP_RS480 &&
+            rdev->pdev->subsystem_vendor == 0x103c &&
+            rdev->pdev->subsystem_device == 0x30ae)
+                return;
+
         /* DYN CLK 1 */
         table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);
         if (table)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 4f0c1ecac72e..c4b8741dbf58 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1297,12 +1297,33 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
                 if (!radeon_dig_connector->edp_on)
                         atombios_set_edp_panel_power(connector,
                                                      ATOM_TRANSMITTER_ACTION_POWER_OFF);
-        } else {
-                /* need to setup ddc on the bridge */
-                if (radeon_connector_encoder_is_dp_bridge(connector)) {
+        } else if (radeon_connector_encoder_is_dp_bridge(connector)) {
+                /* DP bridges are always DP */
+                radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
+                /* get the DPCD from the bridge */
+                radeon_dp_getdpcd(radeon_connector);
+
+                if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
+                        ret = connector_status_connected;
+                else {
+                        /* need to setup ddc on the bridge */
                         if (encoder)
                                 radeon_atom_ext_encoder_setup_ddc(encoder);
+                        if (radeon_ddc_probe(radeon_connector,
+                                             radeon_connector->requires_extended_probe))
+                                ret = connector_status_connected;
+                }
+
+                if ((ret == connector_status_disconnected) &&
+                    radeon_connector->dac_load_detect) {
+                        struct drm_encoder *encoder = radeon_best_single_encoder(connector);
+                        struct drm_encoder_helper_funcs *encoder_funcs;
+                        if (encoder) {
+                                encoder_funcs = encoder->helper_private;
+                                ret = encoder_funcs->detect(encoder, connector);
+                        }
                 }
+        } else {
                 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
                 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
                         ret = connector_status_connected;
@@ -1318,16 +1339,6 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
                                         ret = connector_status_connected;
                         }
                 }
-
-                if ((ret == connector_status_disconnected) &&
-                    radeon_connector->dac_load_detect) {
-                        struct drm_encoder *encoder = radeon_best_single_encoder(connector);
-                        struct drm_encoder_helper_funcs *encoder_funcs;
-                        if (encoder) {
-                                encoder_funcs = encoder->helper_private;
-                                ret = encoder_funcs->detect(encoder, connector);
-                        }
-                }
         }
 
         radeon_connector_update_scratch_regs(connector, ret);
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 1a858944e4f3..6cc17fb96a57 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -707,16 +707,21 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
                 radeon_router_select_ddc_port(radeon_connector);
 
         if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
-            (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
+            (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) ||
+            radeon_connector_encoder_is_dp_bridge(&radeon_connector->base)) {
                 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
+
                 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
                      dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus)
-                        radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter);
-        }
-        if (!radeon_connector->ddc_bus)
-                return -1;
-        if (!radeon_connector->edid) {
-                radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
+                        radeon_connector->edid = drm_get_edid(&radeon_connector->base,
+                                                              &dig->dp_i2c_bus->adapter);
+                else if (radeon_connector->ddc_bus && !radeon_connector->edid)
+                        radeon_connector->edid = drm_get_edid(&radeon_connector->base,
+                                                              &radeon_connector->ddc_bus->adapter);
+        } else {
+                if (radeon_connector->ddc_bus && !radeon_connector->edid)
+                        radeon_connector->edid = drm_get_edid(&radeon_connector->base,
+                                                              &radeon_connector->ddc_bus->adapter);
         }
 
         if (!radeon_connector->edid) {