diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-06-21 14:38:03 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-27 10:49:16 -0400 |
commit | 6bd1c3853210e36569601096e2344f8258fd516d (patch) | |
tree | 71b9633963e234e03f12d1096db7206edfe045a0 /drivers/gpu | |
parent | 46f9564ab03e4bf04ffa9647c4d42751f5cdcb97 (diff) |
drm/radeon: make get_temperature functions a callback
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 26 |
4 files changed, 19 insertions, 27 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 32f7640593f4..91e615ff4288 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -220,11 +220,6 @@ int radeon_atom_get_clock_dividers(struct radeon_device *rdev, | |||
220 | struct atom_clock_dividers *dividers); | 220 | struct atom_clock_dividers *dividers); |
221 | void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type); | 221 | void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type); |
222 | void rs690_pm_info(struct radeon_device *rdev); | 222 | void rs690_pm_info(struct radeon_device *rdev); |
223 | extern int rv6xx_get_temp(struct radeon_device *rdev); | ||
224 | extern int rv770_get_temp(struct radeon_device *rdev); | ||
225 | extern int evergreen_get_temp(struct radeon_device *rdev); | ||
226 | extern int sumo_get_temp(struct radeon_device *rdev); | ||
227 | extern int si_get_temp(struct radeon_device *rdev); | ||
228 | extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, | 223 | extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, |
229 | unsigned *bankh, unsigned *mtaspect, | 224 | unsigned *bankh, unsigned *mtaspect, |
230 | unsigned *tile_split); | 225 | unsigned *tile_split); |
@@ -1395,6 +1390,7 @@ struct radeon_asic { | |||
1395 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); | 1390 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); |
1396 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); | 1391 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); |
1397 | int (*set_uvd_clocks)(struct radeon_device *rdev, u32 vclk, u32 dclk); | 1392 | int (*set_uvd_clocks)(struct radeon_device *rdev, u32 vclk, u32 dclk); |
1393 | int (*get_temperature)(struct radeon_device *rdev); | ||
1398 | } pm; | 1394 | } pm; |
1399 | /* pageflipping */ | 1395 | /* pageflipping */ |
1400 | struct { | 1396 | struct { |
@@ -2067,6 +2063,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); | |||
2067 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) | 2063 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) |
2068 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) | 2064 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) |
2069 | #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) | 2065 | #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) |
2066 | #define radeon_get_temperature(rdev) (rdev)->asic->pm.get_temperature((rdev)) | ||
2070 | #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s))) | 2067 | #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s))) |
2071 | #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) | 2068 | #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) |
2072 | #define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) | 2069 | #define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 25deb119d01e..9f5426388cf7 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -1052,6 +1052,7 @@ static struct radeon_asic r600_asic = { | |||
1052 | .get_pcie_lanes = &r600_get_pcie_lanes, | 1052 | .get_pcie_lanes = &r600_get_pcie_lanes, |
1053 | .set_pcie_lanes = &r600_set_pcie_lanes, | 1053 | .set_pcie_lanes = &r600_set_pcie_lanes, |
1054 | .set_clock_gating = NULL, | 1054 | .set_clock_gating = NULL, |
1055 | .get_temperature = &rv6xx_get_temp, | ||
1055 | }, | 1056 | }, |
1056 | .pflip = { | 1057 | .pflip = { |
1057 | .pre_page_flip = &rs600_pre_page_flip, | 1058 | .pre_page_flip = &rs600_pre_page_flip, |
@@ -1146,6 +1147,7 @@ static struct radeon_asic rs780_asic = { | |||
1146 | .get_pcie_lanes = NULL, | 1147 | .get_pcie_lanes = NULL, |
1147 | .set_pcie_lanes = NULL, | 1148 | .set_pcie_lanes = NULL, |
1148 | .set_clock_gating = NULL, | 1149 | .set_clock_gating = NULL, |
1150 | .get_temperature = &rv6xx_get_temp, | ||
1149 | }, | 1151 | }, |
1150 | .pflip = { | 1152 | .pflip = { |
1151 | .pre_page_flip = &rs600_pre_page_flip, | 1153 | .pre_page_flip = &rs600_pre_page_flip, |
@@ -1253,6 +1255,7 @@ static struct radeon_asic rv770_asic = { | |||
1253 | .set_pcie_lanes = &r600_set_pcie_lanes, | 1255 | .set_pcie_lanes = &r600_set_pcie_lanes, |
1254 | .set_clock_gating = &radeon_atom_set_clock_gating, | 1256 | .set_clock_gating = &radeon_atom_set_clock_gating, |
1255 | .set_uvd_clocks = &rv770_set_uvd_clocks, | 1257 | .set_uvd_clocks = &rv770_set_uvd_clocks, |
1258 | .get_temperature = &rv770_get_temp, | ||
1256 | }, | 1259 | }, |
1257 | .pflip = { | 1260 | .pflip = { |
1258 | .pre_page_flip = &rs600_pre_page_flip, | 1261 | .pre_page_flip = &rs600_pre_page_flip, |
@@ -1360,6 +1363,7 @@ static struct radeon_asic evergreen_asic = { | |||
1360 | .set_pcie_lanes = &r600_set_pcie_lanes, | 1363 | .set_pcie_lanes = &r600_set_pcie_lanes, |
1361 | .set_clock_gating = NULL, | 1364 | .set_clock_gating = NULL, |
1362 | .set_uvd_clocks = &evergreen_set_uvd_clocks, | 1365 | .set_uvd_clocks = &evergreen_set_uvd_clocks, |
1366 | .get_temperature = &evergreen_get_temp, | ||
1363 | }, | 1367 | }, |
1364 | .pflip = { | 1368 | .pflip = { |
1365 | .pre_page_flip = &evergreen_pre_page_flip, | 1369 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -1467,6 +1471,7 @@ static struct radeon_asic sumo_asic = { | |||
1467 | .set_pcie_lanes = NULL, | 1471 | .set_pcie_lanes = NULL, |
1468 | .set_clock_gating = NULL, | 1472 | .set_clock_gating = NULL, |
1469 | .set_uvd_clocks = &sumo_set_uvd_clocks, | 1473 | .set_uvd_clocks = &sumo_set_uvd_clocks, |
1474 | .get_temperature = &sumo_get_temp, | ||
1470 | }, | 1475 | }, |
1471 | .pflip = { | 1476 | .pflip = { |
1472 | .pre_page_flip = &evergreen_pre_page_flip, | 1477 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -1574,6 +1579,7 @@ static struct radeon_asic btc_asic = { | |||
1574 | .set_pcie_lanes = &r600_set_pcie_lanes, | 1579 | .set_pcie_lanes = &r600_set_pcie_lanes, |
1575 | .set_clock_gating = NULL, | 1580 | .set_clock_gating = NULL, |
1576 | .set_uvd_clocks = &evergreen_set_uvd_clocks, | 1581 | .set_uvd_clocks = &evergreen_set_uvd_clocks, |
1582 | .get_temperature = &evergreen_get_temp, | ||
1577 | }, | 1583 | }, |
1578 | .pflip = { | 1584 | .pflip = { |
1579 | .pre_page_flip = &evergreen_pre_page_flip, | 1585 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -1733,6 +1739,7 @@ static struct radeon_asic cayman_asic = { | |||
1733 | .set_pcie_lanes = &r600_set_pcie_lanes, | 1739 | .set_pcie_lanes = &r600_set_pcie_lanes, |
1734 | .set_clock_gating = NULL, | 1740 | .set_clock_gating = NULL, |
1735 | .set_uvd_clocks = &evergreen_set_uvd_clocks, | 1741 | .set_uvd_clocks = &evergreen_set_uvd_clocks, |
1742 | .get_temperature = &evergreen_get_temp, | ||
1736 | }, | 1743 | }, |
1737 | .pflip = { | 1744 | .pflip = { |
1738 | .pre_page_flip = &evergreen_pre_page_flip, | 1745 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -2047,6 +2054,7 @@ static struct radeon_asic si_asic = { | |||
2047 | .set_pcie_lanes = &r600_set_pcie_lanes, | 2054 | .set_pcie_lanes = &r600_set_pcie_lanes, |
2048 | .set_clock_gating = NULL, | 2055 | .set_clock_gating = NULL, |
2049 | .set_uvd_clocks = &si_set_uvd_clocks, | 2056 | .set_uvd_clocks = &si_set_uvd_clocks, |
2057 | .get_temperature = &si_get_temp, | ||
2050 | }, | 2058 | }, |
2051 | .pflip = { | 2059 | .pflip = { |
2052 | .pre_page_flip = &evergreen_pre_page_flip, | 2060 | .pre_page_flip = &evergreen_pre_page_flip, |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 68ba3ff5195e..74f04a8c7db4 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -401,6 +401,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev, | |||
401 | int r600_mc_wait_for_idle(struct radeon_device *rdev); | 401 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
402 | u32 r600_get_xclk(struct radeon_device *rdev); | 402 | u32 r600_get_xclk(struct radeon_device *rdev); |
403 | uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); | 403 | uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); |
404 | int rv6xx_get_temp(struct radeon_device *rdev); | ||
404 | 405 | ||
405 | /* uvd */ | 406 | /* uvd */ |
406 | int r600_uvd_init(struct radeon_device *rdev); | 407 | int r600_uvd_init(struct radeon_device *rdev); |
@@ -434,6 +435,7 @@ int rv770_copy_dma(struct radeon_device *rdev, | |||
434 | u32 rv770_get_xclk(struct radeon_device *rdev); | 435 | u32 rv770_get_xclk(struct radeon_device *rdev); |
435 | int rv770_uvd_resume(struct radeon_device *rdev); | 436 | int rv770_uvd_resume(struct radeon_device *rdev); |
436 | int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); | 437 | int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
438 | int rv770_get_temp(struct radeon_device *rdev); | ||
437 | 439 | ||
438 | /* | 440 | /* |
439 | * evergreen | 441 | * evergreen |
@@ -488,6 +490,8 @@ int evergreen_copy_dma(struct radeon_device *rdev, | |||
488 | struct radeon_fence **fence); | 490 | struct radeon_fence **fence); |
489 | void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); | 491 | void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); |
490 | void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); | 492 | void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
493 | int evergreen_get_temp(struct radeon_device *rdev); | ||
494 | int sumo_get_temp(struct radeon_device *rdev); | ||
491 | 495 | ||
492 | /* | 496 | /* |
493 | * cayman | 497 | * cayman |
@@ -558,6 +562,7 @@ void si_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) | |||
558 | u32 si_get_xclk(struct radeon_device *rdev); | 562 | u32 si_get_xclk(struct radeon_device *rdev); |
559 | uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); | 563 | uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); |
560 | int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); | 564 | int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
565 | int si_get_temp(struct radeon_device *rdev); | ||
561 | 566 | ||
562 | /* DCE8 - CIK */ | 567 | /* DCE8 - CIK */ |
563 | void dce8_bandwidth_update(struct radeon_device *rdev); | 568 | void dce8_bandwidth_update(struct radeon_device *rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 788c64cb4b47..e8c1bea9b57b 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -434,27 +434,10 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, | |||
434 | struct radeon_device *rdev = ddev->dev_private; | 434 | struct radeon_device *rdev = ddev->dev_private; |
435 | int temp; | 435 | int temp; |
436 | 436 | ||
437 | switch (rdev->pm.int_thermal_type) { | 437 | if (rdev->asic->pm.get_temperature) |
438 | case THERMAL_TYPE_RV6XX: | 438 | temp = radeon_get_temperature(rdev); |
439 | temp = rv6xx_get_temp(rdev); | 439 | else |
440 | break; | ||
441 | case THERMAL_TYPE_RV770: | ||
442 | temp = rv770_get_temp(rdev); | ||
443 | break; | ||
444 | case THERMAL_TYPE_EVERGREEN: | ||
445 | case THERMAL_TYPE_NI: | ||
446 | temp = evergreen_get_temp(rdev); | ||
447 | break; | ||
448 | case THERMAL_TYPE_SUMO: | ||
449 | temp = sumo_get_temp(rdev); | ||
450 | break; | ||
451 | case THERMAL_TYPE_SI: | ||
452 | temp = si_get_temp(rdev); | ||
453 | break; | ||
454 | default: | ||
455 | temp = 0; | 440 | temp = 0; |
456 | break; | ||
457 | } | ||
458 | 441 | ||
459 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); | 442 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); |
460 | } | 443 | } |
@@ -492,8 +475,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev) | |||
492 | case THERMAL_TYPE_NI: | 475 | case THERMAL_TYPE_NI: |
493 | case THERMAL_TYPE_SUMO: | 476 | case THERMAL_TYPE_SUMO: |
494 | case THERMAL_TYPE_SI: | 477 | case THERMAL_TYPE_SI: |
495 | /* No support for TN yet */ | 478 | if (rdev->asic->pm.get_temperature == NULL) |
496 | if (rdev->family == CHIP_ARUBA) | ||
497 | return err; | 479 | return err; |
498 | rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); | 480 | rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); |
499 | if (IS_ERR(rdev->pm.int_hwmon_dev)) { | 481 | if (IS_ERR(rdev->pm.int_hwmon_dev)) { |