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authorOscar Mateo <oscar.mateo@intel.com>2014-08-07 08:23:20 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-08-20 11:17:49 -0400
commit4ba70e448be91f52032595678c306e4aee2fae5c (patch)
tree0884883af3ea42a236268e33a84a4c86cd73f1b7 /drivers/gpu
parent71386ef9008817feebd863e46d8711ebe9e7cbbb (diff)
drm/i915/bdw: Display execlists info in debugfs
v2: Warn and return if LRCs are not enabled. v3: Grab the Execlists spinlock (noticed by Daniel Vetter). Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> v4: Lock the struct mutex for atomic state capture Signed-off-by: Thomas Daniel <thomas.daniel@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> [danvet: Checkpatch.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c81
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c6
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.h7
3 files changed, 88 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index d42db6bc34e0..68335813ef4c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1721,6 +1721,86 @@ static int i915_context_status(struct seq_file *m, void *unused)
1721 return 0; 1721 return 0;
1722} 1722}
1723 1723
1724static int i915_execlists(struct seq_file *m, void *data)
1725{
1726 struct drm_info_node *node = (struct drm_info_node *)m->private;
1727 struct drm_device *dev = node->minor->dev;
1728 struct drm_i915_private *dev_priv = dev->dev_private;
1729 struct intel_engine_cs *ring;
1730 u32 status_pointer;
1731 u8 read_pointer;
1732 u8 write_pointer;
1733 u32 status;
1734 u32 ctx_id;
1735 struct list_head *cursor;
1736 int ring_id, i;
1737 int ret;
1738
1739 if (!i915.enable_execlists) {
1740 seq_puts(m, "Logical Ring Contexts are disabled\n");
1741 return 0;
1742 }
1743
1744 ret = mutex_lock_interruptible(&dev->struct_mutex);
1745 if (ret)
1746 return ret;
1747
1748 for_each_ring(ring, dev_priv, ring_id) {
1749 struct intel_ctx_submit_request *head_req = NULL;
1750 int count = 0;
1751 unsigned long flags;
1752
1753 seq_printf(m, "%s\n", ring->name);
1754
1755 status = I915_READ(RING_EXECLIST_STATUS(ring));
1756 ctx_id = I915_READ(RING_EXECLIST_STATUS(ring) + 4);
1757 seq_printf(m, "\tExeclist status: 0x%08X, context: %u\n",
1758 status, ctx_id);
1759
1760 status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring));
1761 seq_printf(m, "\tStatus pointer: 0x%08X\n", status_pointer);
1762
1763 read_pointer = ring->next_context_status_buffer;
1764 write_pointer = status_pointer & 0x07;
1765 if (read_pointer > write_pointer)
1766 write_pointer += 6;
1767 seq_printf(m, "\tRead pointer: 0x%08X, write pointer 0x%08X\n",
1768 read_pointer, write_pointer);
1769
1770 for (i = 0; i < 6; i++) {
1771 status = I915_READ(RING_CONTEXT_STATUS_BUF(ring) + 8*i);
1772 ctx_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) + 8*i + 4);
1773
1774 seq_printf(m, "\tStatus buffer %d: 0x%08X, context: %u\n",
1775 i, status, ctx_id);
1776 }
1777
1778 spin_lock_irqsave(&ring->execlist_lock, flags);
1779 list_for_each(cursor, &ring->execlist_queue)
1780 count++;
1781 head_req = list_first_entry_or_null(&ring->execlist_queue,
1782 struct intel_ctx_submit_request, execlist_link);
1783 spin_unlock_irqrestore(&ring->execlist_lock, flags);
1784
1785 seq_printf(m, "\t%d requests in queue\n", count);
1786 if (head_req) {
1787 struct drm_i915_gem_object *ctx_obj;
1788
1789 ctx_obj = head_req->ctx->engine[ring_id].state;
1790 seq_printf(m, "\tHead request id: %u\n",
1791 intel_execlists_ctx_id(ctx_obj));
1792 seq_printf(m, "\tHead request tail: %u\n",
1793 head_req->tail);
1794 }
1795
1796 seq_putc(m, '\n');
1797 }
1798
1799 mutex_unlock(&dev->struct_mutex);
1800
1801 return 0;
1802}
1803
1724static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data) 1804static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1725{ 1805{
1726 struct drm_info_node *node = m->private; 1806 struct drm_info_node *node = m->private;
@@ -3974,6 +4054,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
3974 {"i915_opregion", i915_opregion, 0}, 4054 {"i915_opregion", i915_opregion, 0},
3975 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 4055 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
3976 {"i915_context_status", i915_context_status, 0}, 4056 {"i915_context_status", i915_context_status, 0},
4057 {"i915_execlists", i915_execlists, 0},
3977 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0}, 4058 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
3978 {"i915_swizzle_info", i915_swizzle_info, 0}, 4059 {"i915_swizzle_info", i915_swizzle_info, 0},
3979 {"i915_ppgtt_info", i915_ppgtt_info, 0}, 4060 {"i915_ppgtt_info", i915_ppgtt_info, 0},
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 6f6c5a931faf..cc923a96fa4c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -46,12 +46,6 @@
46 46
47#define GEN8_LR_CONTEXT_ALIGN 4096 47#define GEN8_LR_CONTEXT_ALIGN 4096
48 48
49#define RING_ELSP(ring) ((ring)->mmio_base+0x230)
50#define RING_EXECLIST_STATUS(ring) ((ring)->mmio_base+0x234)
51#define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244)
52#define RING_CONTEXT_STATUS_BUF(ring) ((ring)->mmio_base+0x370)
53#define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0)
54
55#define RING_EXECLIST_QFULL (1 << 0x2) 49#define RING_EXECLIST_QFULL (1 << 0x2)
56#define RING_EXECLIST1_VALID (1 << 0x3) 50#define RING_EXECLIST1_VALID (1 << 0x3)
57#define RING_EXECLIST0_VALID (1 << 0x4) 51#define RING_EXECLIST0_VALID (1 << 0x4)
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 331c6c2ba376..117d1a4eb3b9 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -24,6 +24,13 @@
24#ifndef _INTEL_LRC_H_ 24#ifndef _INTEL_LRC_H_
25#define _INTEL_LRC_H_ 25#define _INTEL_LRC_H_
26 26
27/* Execlists regs */
28#define RING_ELSP(ring) ((ring)->mmio_base+0x230)
29#define RING_EXECLIST_STATUS(ring) ((ring)->mmio_base+0x234)
30#define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244)
31#define RING_CONTEXT_STATUS_BUF(ring) ((ring)->mmio_base+0x370)
32#define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0)
33
27/* Logical Rings */ 34/* Logical Rings */
28void intel_logical_ring_stop(struct intel_engine_cs *ring); 35void intel_logical_ring_stop(struct intel_engine_cs *ring);
29void intel_logical_ring_cleanup(struct intel_engine_cs *ring); 36void intel_logical_ring_cleanup(struct intel_engine_cs *ring);