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authorChris Wilson <chris@chris-wilson.co.uk>2012-12-18 17:13:14 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-01-08 11:55:41 -0500
commitc16ed4be4c3c691e8c11dc6d22490f79f030d300 (patch)
tree6dd2680e2dec8e022454a12d57b0762e5eedcfb6 /drivers/gpu
parentcc7ebb2892197fbf2512063547dfd1702bc936fa (diff)
drm/i915: Add DEBUG messages to all intel_create_user_framebuffer error paths
This proves to be very useful when investigating why code suddenly started failing. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c33
1 files changed, 25 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5c869cb26528..da1ad9c80bb5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8598,19 +8598,30 @@ int intel_framebuffer_init(struct drm_device *dev,
8598{ 8598{
8599 int ret; 8599 int ret;
8600 8600
8601 if (obj->tiling_mode == I915_TILING_Y) 8601 if (obj->tiling_mode == I915_TILING_Y) {
8602 DRM_DEBUG("hardware does not support tiling Y\n");
8602 return -EINVAL; 8603 return -EINVAL;
8604 }
8603 8605
8604 if (mode_cmd->pitches[0] & 63) 8606 if (mode_cmd->pitches[0] & 63) {
8607 DRM_DEBUG("pitch (%d) must be at least 64 byte aligned\n",
8608 mode_cmd->pitches[0]);
8605 return -EINVAL; 8609 return -EINVAL;
8610 }
8606 8611
8607 /* FIXME <= Gen4 stride limits are bit unclear */ 8612 /* FIXME <= Gen4 stride limits are bit unclear */
8608 if (mode_cmd->pitches[0] > 32768) 8613 if (mode_cmd->pitches[0] > 32768) {
8614 DRM_DEBUG("pitch (%d) must be at less than 32768\n",
8615 mode_cmd->pitches[0]);
8609 return -EINVAL; 8616 return -EINVAL;
8617 }
8610 8618
8611 if (obj->tiling_mode != I915_TILING_NONE && 8619 if (obj->tiling_mode != I915_TILING_NONE &&
8612 mode_cmd->pitches[0] != obj->stride) 8620 mode_cmd->pitches[0] != obj->stride) {
8621 DRM_DEBUG("pitch (%d) must match tiling stride (%d)\n",
8622 mode_cmd->pitches[0], obj->stride);
8613 return -EINVAL; 8623 return -EINVAL;
8624 }
8614 8625
8615 /* Reject formats not supported by any plane early. */ 8626 /* Reject formats not supported by any plane early. */
8616 switch (mode_cmd->pixel_format) { 8627 switch (mode_cmd->pixel_format) {
@@ -8621,8 +8632,10 @@ int intel_framebuffer_init(struct drm_device *dev,
8621 break; 8632 break;
8622 case DRM_FORMAT_XRGB1555: 8633 case DRM_FORMAT_XRGB1555:
8623 case DRM_FORMAT_ARGB1555: 8634 case DRM_FORMAT_ARGB1555:
8624 if (INTEL_INFO(dev)->gen > 3) 8635 if (INTEL_INFO(dev)->gen > 3) {
8636 DRM_DEBUG("invalid format: 0x%08x\n", mode_cmd->pixel_format);
8625 return -EINVAL; 8637 return -EINVAL;
8638 }
8626 break; 8639 break;
8627 case DRM_FORMAT_XBGR8888: 8640 case DRM_FORMAT_XBGR8888:
8628 case DRM_FORMAT_ABGR8888: 8641 case DRM_FORMAT_ABGR8888:
@@ -8630,18 +8643,22 @@ int intel_framebuffer_init(struct drm_device *dev,
8630 case DRM_FORMAT_ARGB2101010: 8643 case DRM_FORMAT_ARGB2101010:
8631 case DRM_FORMAT_XBGR2101010: 8644 case DRM_FORMAT_XBGR2101010:
8632 case DRM_FORMAT_ABGR2101010: 8645 case DRM_FORMAT_ABGR2101010:
8633 if (INTEL_INFO(dev)->gen < 4) 8646 if (INTEL_INFO(dev)->gen < 4) {
8647 DRM_DEBUG("invalid format: 0x%08x\n", mode_cmd->pixel_format);
8634 return -EINVAL; 8648 return -EINVAL;
8649 }
8635 break; 8650 break;
8636 case DRM_FORMAT_YUYV: 8651 case DRM_FORMAT_YUYV:
8637 case DRM_FORMAT_UYVY: 8652 case DRM_FORMAT_UYVY:
8638 case DRM_FORMAT_YVYU: 8653 case DRM_FORMAT_YVYU:
8639 case DRM_FORMAT_VYUY: 8654 case DRM_FORMAT_VYUY:
8640 if (INTEL_INFO(dev)->gen < 5) 8655 if (INTEL_INFO(dev)->gen < 5) {
8656 DRM_DEBUG("invalid format: 0x%08x\n", mode_cmd->pixel_format);
8641 return -EINVAL; 8657 return -EINVAL;
8658 }
8642 break; 8659 break;
8643 default: 8660 default:
8644 DRM_DEBUG_KMS("unsupported pixel format 0x%08x\n", mode_cmd->pixel_format); 8661 DRM_DEBUG("unsupported pixel format 0x%08x\n", mode_cmd->pixel_format);
8645 return -EINVAL; 8662 return -EINVAL;
8646 } 8663 }
8647 8664