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authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>2012-07-13 08:50:33 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-20 06:21:40 -0400
commit796265235b47cb40ecfa906cb2c3206bd0d07431 (patch)
tree861d9a4a95993bc522988329449eeed8d7739e6c /drivers/gpu
parent0d71068835e2610576d369d6d4cbf90e0f802a71 (diff)
drm/i915: mask tiled bit when updating ILK sprites
Or going from tiled to untiled may break. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 1a1483b924d0..cc8df4de2d92 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -234,6 +234,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
234 dvscntr &= ~DVS_PIXFORMAT_MASK; 234 dvscntr &= ~DVS_PIXFORMAT_MASK;
235 dvscntr &= ~DVS_RGB_ORDER_XBGR; 235 dvscntr &= ~DVS_RGB_ORDER_XBGR;
236 dvscntr &= ~DVS_YUV_BYTE_ORDER_MASK; 236 dvscntr &= ~DVS_YUV_BYTE_ORDER_MASK;
237 dvscntr &= ~DVS_TILED;
237 238
238 switch (fb->pixel_format) { 239 switch (fb->pixel_format) {
239 case DRM_FORMAT_XBGR8888: 240 case DRM_FORMAT_XBGR8888: