diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2009-11-02 18:53:02 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-11-05 23:13:25 -0500 |
commit | 7433874e31f7f2e6e942b12012790565731d0f4a (patch) | |
tree | b67ed1c06492f5d0831762ab8b3a9267b65b94da /drivers/gpu | |
parent | a3fa6320ce964f799388b152a1b0f6e2c3b32a7f (diff) |
drm/radeon/kms: add debugfs for power management for AtomBIOS devices
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/Makefile | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r420.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r520.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 23 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 18 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_clocks.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 65 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs690.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv515.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 3 |
13 files changed, 132 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index 09a28923f46e..b5713eedd6e1 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile | |||
@@ -49,7 +49,7 @@ radeon-y += radeon_device.o radeon_kms.o \ | |||
49 | radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ | 49 | radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ |
50 | rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ | 50 | rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ |
51 | r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ | 51 | r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ |
52 | r600_blit_kms.o | 52 | r600_blit_kms.o radeon_pm.o |
53 | 53 | ||
54 | radeon-$(CONFIG_COMPAT) += radeon_ioc32.o | 54 | radeon-$(CONFIG_COMPAT) += radeon_ioc32.o |
55 | 55 | ||
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 5c7fe52de30e..1cefdbcc0850 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c | |||
@@ -311,6 +311,8 @@ int r420_init(struct radeon_device *rdev) | |||
311 | } | 311 | } |
312 | /* Initialize clocks */ | 312 | /* Initialize clocks */ |
313 | radeon_get_clock_info(rdev->ddev); | 313 | radeon_get_clock_info(rdev->ddev); |
314 | /* Initialize power management */ | ||
315 | radeon_pm_init(rdev); | ||
314 | /* Get vram informations */ | 316 | /* Get vram informations */ |
315 | r300_vram_info(rdev); | 317 | r300_vram_info(rdev); |
316 | /* Initialize memory controller (also test AGP) */ | 318 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index a555b7b19b48..f7435185c0a6 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c | |||
@@ -260,6 +260,8 @@ int r520_init(struct radeon_device *rdev) | |||
260 | } | 260 | } |
261 | /* Initialize clocks */ | 261 | /* Initialize clocks */ |
262 | radeon_get_clock_info(rdev->ddev); | 262 | radeon_get_clock_info(rdev->ddev); |
263 | /* Initialize power management */ | ||
264 | radeon_pm_init(rdev); | ||
263 | /* Get vram informations */ | 265 | /* Get vram informations */ |
264 | r520_vram_info(rdev); | 266 | r520_vram_info(rdev); |
265 | /* Initialize memory controller (also test AGP) */ | 267 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 35360b09df31..8d6bc12192d2 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1621,10 +1621,13 @@ int r600_init(struct radeon_device *rdev) | |||
1621 | r600_scratch_init(rdev); | 1621 | r600_scratch_init(rdev); |
1622 | /* Initialize surface registers */ | 1622 | /* Initialize surface registers */ |
1623 | radeon_surface_init(rdev); | 1623 | radeon_surface_init(rdev); |
1624 | /* Initialize clocks */ | ||
1624 | radeon_get_clock_info(rdev->ddev); | 1625 | radeon_get_clock_info(rdev->ddev); |
1625 | r = radeon_clocks_init(rdev); | 1626 | r = radeon_clocks_init(rdev); |
1626 | if (r) | 1627 | if (r) |
1627 | return r; | 1628 | return r; |
1629 | /* Initialize power management */ | ||
1630 | radeon_pm_init(rdev); | ||
1628 | /* Fence driver */ | 1631 | /* Fence driver */ |
1629 | r = radeon_fence_driver_init(rdev); | 1632 | r = radeon_fence_driver_init(rdev); |
1630 | if (r) | 1633 | if (r) |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index ea3efd7ae85b..9f0bd9847884 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -139,6 +139,10 @@ struct radeon_clock { | |||
139 | uint32_t default_sclk; | 139 | uint32_t default_sclk; |
140 | }; | 140 | }; |
141 | 141 | ||
142 | /* | ||
143 | * Power management | ||
144 | */ | ||
145 | int radeon_pm_init(struct radeon_device *rdev); | ||
142 | 146 | ||
143 | /* | 147 | /* |
144 | * Fences. | 148 | * Fences. |
@@ -622,7 +626,9 @@ struct radeon_asic { | |||
622 | uint64_t dst_offset, | 626 | uint64_t dst_offset, |
623 | unsigned num_pages, | 627 | unsigned num_pages, |
624 | struct radeon_fence *fence); | 628 | struct radeon_fence *fence); |
629 | uint32_t (*get_engine_clock)(struct radeon_device *rdev); | ||
625 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); | 630 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); |
631 | uint32_t (*get_memory_clock)(struct radeon_device *rdev); | ||
626 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); | 632 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); |
627 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); | 633 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); |
628 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); | 634 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); |
@@ -953,7 +959,9 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v) | |||
953 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) | 959 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) |
954 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) | 960 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) |
955 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) | 961 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) |
962 | #define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev)) | ||
956 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) | 963 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
964 | #define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev)) | ||
957 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) | 965 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
958 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) | 966 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) |
959 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) | 967 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index d38f99632827..94991edc839f 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -31,10 +31,13 @@ | |||
31 | /* | 31 | /* |
32 | * common functions | 32 | * common functions |
33 | */ | 33 | */ |
34 | uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); | ||
34 | void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); | 35 | void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
35 | void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); | 36 | void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); |
36 | 37 | ||
38 | uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); | ||
37 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); | 39 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
40 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); | ||
38 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); | 41 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); |
39 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); | 42 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); |
40 | 43 | ||
@@ -93,7 +96,9 @@ static struct radeon_asic r100_asic = { | |||
93 | .copy_blit = &r100_copy_blit, | 96 | .copy_blit = &r100_copy_blit, |
94 | .copy_dma = NULL, | 97 | .copy_dma = NULL, |
95 | .copy = &r100_copy_blit, | 98 | .copy = &r100_copy_blit, |
99 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
96 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 100 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
101 | .get_memory_clock = NULL, | ||
97 | .set_memory_clock = NULL, | 102 | .set_memory_clock = NULL, |
98 | .set_pcie_lanes = NULL, | 103 | .set_pcie_lanes = NULL, |
99 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 104 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -145,7 +150,9 @@ static struct radeon_asic r300_asic = { | |||
145 | .copy_blit = &r100_copy_blit, | 150 | .copy_blit = &r100_copy_blit, |
146 | .copy_dma = &r300_copy_dma, | 151 | .copy_dma = &r300_copy_dma, |
147 | .copy = &r100_copy_blit, | 152 | .copy = &r100_copy_blit, |
153 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
148 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 154 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
155 | .get_memory_clock = NULL, | ||
149 | .set_memory_clock = NULL, | 156 | .set_memory_clock = NULL, |
150 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 157 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
151 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 158 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -181,7 +188,9 @@ static struct radeon_asic r420_asic = { | |||
181 | .copy_blit = &r100_copy_blit, | 188 | .copy_blit = &r100_copy_blit, |
182 | .copy_dma = &r300_copy_dma, | 189 | .copy_dma = &r300_copy_dma, |
183 | .copy = &r100_copy_blit, | 190 | .copy = &r100_copy_blit, |
191 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
184 | .set_engine_clock = &radeon_atom_set_engine_clock, | 192 | .set_engine_clock = &radeon_atom_set_engine_clock, |
193 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
185 | .set_memory_clock = &radeon_atom_set_memory_clock, | 194 | .set_memory_clock = &radeon_atom_set_memory_clock, |
186 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 195 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
187 | .set_clock_gating = &radeon_atom_set_clock_gating, | 196 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -222,7 +231,9 @@ static struct radeon_asic rs400_asic = { | |||
222 | .copy_blit = &r100_copy_blit, | 231 | .copy_blit = &r100_copy_blit, |
223 | .copy_dma = &r300_copy_dma, | 232 | .copy_dma = &r300_copy_dma, |
224 | .copy = &r100_copy_blit, | 233 | .copy = &r100_copy_blit, |
234 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
225 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 235 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
236 | .get_memory_clock = NULL, | ||
226 | .set_memory_clock = NULL, | 237 | .set_memory_clock = NULL, |
227 | .set_pcie_lanes = NULL, | 238 | .set_pcie_lanes = NULL, |
228 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 239 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -267,7 +278,9 @@ static struct radeon_asic rs600_asic = { | |||
267 | .copy_blit = &r100_copy_blit, | 278 | .copy_blit = &r100_copy_blit, |
268 | .copy_dma = &r300_copy_dma, | 279 | .copy_dma = &r300_copy_dma, |
269 | .copy = &r100_copy_blit, | 280 | .copy = &r100_copy_blit, |
281 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
270 | .set_engine_clock = &radeon_atom_set_engine_clock, | 282 | .set_engine_clock = &radeon_atom_set_engine_clock, |
283 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
271 | .set_memory_clock = &radeon_atom_set_memory_clock, | 284 | .set_memory_clock = &radeon_atom_set_memory_clock, |
272 | .set_pcie_lanes = NULL, | 285 | .set_pcie_lanes = NULL, |
273 | .set_clock_gating = &radeon_atom_set_clock_gating, | 286 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -305,7 +318,9 @@ static struct radeon_asic rs690_asic = { | |||
305 | .copy_blit = &r100_copy_blit, | 318 | .copy_blit = &r100_copy_blit, |
306 | .copy_dma = &r300_copy_dma, | 319 | .copy_dma = &r300_copy_dma, |
307 | .copy = &r300_copy_dma, | 320 | .copy = &r300_copy_dma, |
321 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
308 | .set_engine_clock = &radeon_atom_set_engine_clock, | 322 | .set_engine_clock = &radeon_atom_set_engine_clock, |
323 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
309 | .set_memory_clock = &radeon_atom_set_memory_clock, | 324 | .set_memory_clock = &radeon_atom_set_memory_clock, |
310 | .set_pcie_lanes = NULL, | 325 | .set_pcie_lanes = NULL, |
311 | .set_clock_gating = &radeon_atom_set_clock_gating, | 326 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -349,7 +364,9 @@ static struct radeon_asic rv515_asic = { | |||
349 | .copy_blit = &r100_copy_blit, | 364 | .copy_blit = &r100_copy_blit, |
350 | .copy_dma = &r300_copy_dma, | 365 | .copy_dma = &r300_copy_dma, |
351 | .copy = &r100_copy_blit, | 366 | .copy = &r100_copy_blit, |
367 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
352 | .set_engine_clock = &radeon_atom_set_engine_clock, | 368 | .set_engine_clock = &radeon_atom_set_engine_clock, |
369 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
353 | .set_memory_clock = &radeon_atom_set_memory_clock, | 370 | .set_memory_clock = &radeon_atom_set_memory_clock, |
354 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 371 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
355 | .set_clock_gating = &radeon_atom_set_clock_gating, | 372 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -384,7 +401,9 @@ static struct radeon_asic r520_asic = { | |||
384 | .copy_blit = &r100_copy_blit, | 401 | .copy_blit = &r100_copy_blit, |
385 | .copy_dma = &r300_copy_dma, | 402 | .copy_dma = &r300_copy_dma, |
386 | .copy = &r100_copy_blit, | 403 | .copy = &r100_copy_blit, |
404 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
387 | .set_engine_clock = &radeon_atom_set_engine_clock, | 405 | .set_engine_clock = &radeon_atom_set_engine_clock, |
406 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
388 | .set_memory_clock = &radeon_atom_set_memory_clock, | 407 | .set_memory_clock = &radeon_atom_set_memory_clock, |
389 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 408 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
390 | .set_clock_gating = &radeon_atom_set_clock_gating, | 409 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -445,7 +464,9 @@ static struct radeon_asic r600_asic = { | |||
445 | .copy_blit = &r600_copy_blit, | 464 | .copy_blit = &r600_copy_blit, |
446 | .copy_dma = &r600_copy_blit, | 465 | .copy_dma = &r600_copy_blit, |
447 | .copy = &r600_copy_blit, | 466 | .copy = &r600_copy_blit, |
467 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
448 | .set_engine_clock = &radeon_atom_set_engine_clock, | 468 | .set_engine_clock = &radeon_atom_set_engine_clock, |
469 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
449 | .set_memory_clock = &radeon_atom_set_memory_clock, | 470 | .set_memory_clock = &radeon_atom_set_memory_clock, |
450 | .set_pcie_lanes = NULL, | 471 | .set_pcie_lanes = NULL, |
451 | .set_clock_gating = &radeon_atom_set_clock_gating, | 472 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -481,7 +502,9 @@ static struct radeon_asic rv770_asic = { | |||
481 | .copy_blit = &r600_copy_blit, | 502 | .copy_blit = &r600_copy_blit, |
482 | .copy_dma = &r600_copy_blit, | 503 | .copy_dma = &r600_copy_blit, |
483 | .copy = &r600_copy_blit, | 504 | .copy = &r600_copy_blit, |
505 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
484 | .set_engine_clock = &radeon_atom_set_engine_clock, | 506 | .set_engine_clock = &radeon_atom_set_engine_clock, |
507 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
485 | .set_memory_clock = &radeon_atom_set_memory_clock, | 508 | .set_memory_clock = &radeon_atom_set_memory_clock, |
486 | .set_pcie_lanes = NULL, | 509 | .set_pcie_lanes = NULL, |
487 | .set_clock_gating = &radeon_atom_set_clock_gating, | 510 | .set_clock_gating = &radeon_atom_set_clock_gating, |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 80aacded85a0..2ed88a820935 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -1133,6 +1133,24 @@ void radeon_atom_static_pwrmgt_setup(struct radeon_device *rdev, int enable) | |||
1133 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 1133 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
1134 | } | 1134 | } |
1135 | 1135 | ||
1136 | uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev) | ||
1137 | { | ||
1138 | GET_ENGINE_CLOCK_PS_ALLOCATION args; | ||
1139 | int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock); | ||
1140 | |||
1141 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1142 | return args.ulReturnEngineClock; | ||
1143 | } | ||
1144 | |||
1145 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev) | ||
1146 | { | ||
1147 | GET_MEMORY_CLOCK_PS_ALLOCATION args; | ||
1148 | int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock); | ||
1149 | |||
1150 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1151 | return args.ulReturnMemoryClock; | ||
1152 | } | ||
1153 | |||
1136 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, | 1154 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, |
1137 | uint32_t eng_clock) | 1155 | uint32_t eng_clock) |
1138 | { | 1156 | { |
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index f5c32a766b10..a81354167621 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include "atom.h" | 32 | #include "atom.h" |
33 | 33 | ||
34 | /* 10 khz */ | 34 | /* 10 khz */ |
35 | static uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) | 35 | uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) |
36 | { | 36 | { |
37 | struct radeon_pll *spll = &rdev->clock.spll; | 37 | struct radeon_pll *spll = &rdev->clock.spll; |
38 | uint32_t fb_div, ref_div, post_div, sclk; | 38 | uint32_t fb_div, ref_div, post_div, sclk; |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c new file mode 100644 index 000000000000..46146c6a2a06 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -0,0 +1,65 @@ | |||
1 | /* | ||
2 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
3 | * copy of this software and associated documentation files (the "Software"), | ||
4 | * to deal in the Software without restriction, including without limitation | ||
5 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
6 | * and/or sell copies of the Software, and to permit persons to whom the | ||
7 | * Software is furnished to do so, subject to the following conditions: | ||
8 | * | ||
9 | * The above copyright notice and this permission notice shall be included in | ||
10 | * all copies or substantial portions of the Software. | ||
11 | * | ||
12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
13 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
15 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
16 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
17 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
18 | * OTHER DEALINGS IN THE SOFTWARE. | ||
19 | * | ||
20 | * Authors: Rafał Miłecki <zajec5@gmail.com> | ||
21 | */ | ||
22 | #include "drmP.h" | ||
23 | #include "radeon.h" | ||
24 | |||
25 | int radeon_debugfs_pm_init(struct radeon_device *rdev); | ||
26 | |||
27 | int radeon_pm_init(struct radeon_device *rdev) | ||
28 | { | ||
29 | if (radeon_debugfs_pm_init(rdev)) { | ||
30 | DRM_ERROR("Failed to register debugfs file for CP !\n"); | ||
31 | } | ||
32 | |||
33 | return 0; | ||
34 | } | ||
35 | |||
36 | /* | ||
37 | * Debugfs info | ||
38 | */ | ||
39 | #if defined(CONFIG_DEBUG_FS) | ||
40 | |||
41 | static int radeon_debugfs_pm_info(struct seq_file *m, void *data) | ||
42 | { | ||
43 | struct drm_info_node *node = (struct drm_info_node *) m->private; | ||
44 | struct drm_device *dev = node->minor->dev; | ||
45 | struct radeon_device *rdev = dev->dev_private; | ||
46 | |||
47 | seq_printf(m, "engine clock: %u0 Hz\n", radeon_get_engine_clock(rdev)); | ||
48 | seq_printf(m, "memory clock: %u0 Hz\n", radeon_get_memory_clock(rdev)); | ||
49 | |||
50 | return 0; | ||
51 | } | ||
52 | |||
53 | static struct drm_info_list radeon_pm_info_list[] = { | ||
54 | {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL}, | ||
55 | }; | ||
56 | #endif | ||
57 | |||
58 | int radeon_debugfs_pm_init(struct radeon_device *rdev) | ||
59 | { | ||
60 | #if defined(CONFIG_DEBUG_FS) | ||
61 | return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); | ||
62 | #else | ||
63 | return 0; | ||
64 | #endif | ||
65 | } | ||
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 942754c39be9..5f117cd8736a 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -488,6 +488,8 @@ int rs600_init(struct radeon_device *rdev) | |||
488 | } | 488 | } |
489 | /* Initialize clocks */ | 489 | /* Initialize clocks */ |
490 | radeon_get_clock_info(rdev->ddev); | 490 | radeon_get_clock_info(rdev->ddev); |
491 | /* Initialize power management */ | ||
492 | radeon_pm_init(rdev); | ||
491 | /* Get vram informations */ | 493 | /* Get vram informations */ |
492 | rs600_vram_info(rdev); | 494 | rs600_vram_info(rdev); |
493 | /* Initialize memory controller (also test AGP) */ | 495 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 025e3225346c..27547175cf93 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -706,6 +706,8 @@ int rs690_init(struct radeon_device *rdev) | |||
706 | } | 706 | } |
707 | /* Initialize clocks */ | 707 | /* Initialize clocks */ |
708 | radeon_get_clock_info(rdev->ddev); | 708 | radeon_get_clock_info(rdev->ddev); |
709 | /* Initialize power management */ | ||
710 | radeon_pm_init(rdev); | ||
709 | /* Get vram informations */ | 711 | /* Get vram informations */ |
710 | rs690_vram_info(rdev); | 712 | rs690_vram_info(rdev); |
711 | /* Initialize memory controller (also test AGP) */ | 713 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 03c052d892c0..7935f793bf62 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c | |||
@@ -587,6 +587,8 @@ int rv515_init(struct radeon_device *rdev) | |||
587 | } | 587 | } |
588 | /* Initialize clocks */ | 588 | /* Initialize clocks */ |
589 | radeon_get_clock_info(rdev->ddev); | 589 | radeon_get_clock_info(rdev->ddev); |
590 | /* Initialize power management */ | ||
591 | radeon_pm_init(rdev); | ||
590 | /* Get vram informations */ | 592 | /* Get vram informations */ |
591 | rv515_vram_info(rdev); | 593 | rv515_vram_info(rdev); |
592 | /* Initialize memory controller (also test AGP) */ | 594 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index ae074fdf804d..b0efd0ddae7a 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -983,10 +983,13 @@ int rv770_init(struct radeon_device *rdev) | |||
983 | r600_scratch_init(rdev); | 983 | r600_scratch_init(rdev); |
984 | /* Initialize surface registers */ | 984 | /* Initialize surface registers */ |
985 | radeon_surface_init(rdev); | 985 | radeon_surface_init(rdev); |
986 | /* Initialize clocks */ | ||
986 | radeon_get_clock_info(rdev->ddev); | 987 | radeon_get_clock_info(rdev->ddev); |
987 | r = radeon_clocks_init(rdev); | 988 | r = radeon_clocks_init(rdev); |
988 | if (r) | 989 | if (r) |
989 | return r; | 990 | return r; |
991 | /* Initialize power management */ | ||
992 | radeon_pm_init(rdev); | ||
990 | /* Fence driver */ | 993 | /* Fence driver */ |
991 | r = radeon_fence_driver_init(rdev); | 994 | r = radeon_fence_driver_init(rdev); |
992 | if (r) | 995 | if (r) |