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authorEric Anholt <eric@anholt.net>2009-01-27 13:33:49 -0500
committerDave Airlie <airlied@linux.ie>2009-02-08 06:37:56 -0500
commitd9ddcb96e05cfbadf3dbf66859bcaf5eae25af0b (patch)
treeee7b3f9b95f21d8489240578e42f35e6964bc952 /drivers/gpu
parentab657db12d7020629f26f30d287558a8d0e32b41 (diff)
drm/i915: Return error from i915_gem_object_get_fence_reg() when failing.
Previously, the caller would continue along without knowing that the function failed, resulting in potential mis-rendering. Right now vm_fault just returns SIGBUS in that case, and we may need to disable signal handling to avoid that happening. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index af8034d52511..e1f831f166ca 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -52,7 +52,7 @@ static void i915_gem_object_free_page_list(struct drm_gem_object *obj);
52static int i915_gem_object_wait_rendering(struct drm_gem_object *obj); 52static int i915_gem_object_wait_rendering(struct drm_gem_object *obj);
53static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, 53static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj,
54 unsigned alignment); 54 unsigned alignment);
55static void i915_gem_object_get_fence_reg(struct drm_gem_object *obj); 55static int i915_gem_object_get_fence_reg(struct drm_gem_object *obj);
56static void i915_gem_clear_fence_reg(struct drm_gem_object *obj); 56static void i915_gem_clear_fence_reg(struct drm_gem_object *obj);
57static int i915_gem_evict_something(struct drm_device *dev); 57static int i915_gem_evict_something(struct drm_device *dev);
58static int i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj, 58static int i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
@@ -585,8 +585,11 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
585 585
586 /* Need a new fence register? */ 586 /* Need a new fence register? */
587 if (obj_priv->fence_reg == I915_FENCE_REG_NONE && 587 if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
588 obj_priv->tiling_mode != I915_TILING_NONE) 588 obj_priv->tiling_mode != I915_TILING_NONE) {
589 i915_gem_object_get_fence_reg(obj); 589 ret = i915_gem_object_get_fence_reg(obj);
590 if (ret != 0)
591 return VM_FAULT_SIGBUS;
592 }
590 593
591 pfn = ((dev->agp->base + obj_priv->gtt_offset) >> PAGE_SHIFT) + 594 pfn = ((dev->agp->base + obj_priv->gtt_offset) >> PAGE_SHIFT) +
592 page_offset; 595 page_offset;
@@ -1513,7 +1516,7 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
1513 * It then sets up the reg based on the object's properties: address, pitch 1516 * It then sets up the reg based on the object's properties: address, pitch
1514 * and tiling format. 1517 * and tiling format.
1515 */ 1518 */
1516static void 1519static int
1517i915_gem_object_get_fence_reg(struct drm_gem_object *obj) 1520i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
1518{ 1521{
1519 struct drm_device *dev = obj->dev; 1522 struct drm_device *dev = obj->dev;
@@ -1563,10 +1566,11 @@ try_again:
1563 * objects to finish before trying again. 1566 * objects to finish before trying again.
1564 */ 1567 */
1565 if (i == dev_priv->num_fence_regs) { 1568 if (i == dev_priv->num_fence_regs) {
1566 ret = i915_gem_object_wait_rendering(reg->obj); 1569 ret = i915_gem_object_set_to_gtt_domain(reg->obj, 0);
1567 if (ret) { 1570 if (ret) {
1568 WARN(ret, "wait_rendering failed: %d\n", ret); 1571 WARN(ret != -ERESTARTSYS,
1569 return; 1572 "switch to GTT domain failed: %d\n", ret);
1573 return ret;
1570 } 1574 }
1571 goto try_again; 1575 goto try_again;
1572 } 1576 }
@@ -1591,6 +1595,8 @@ try_again:
1591 i915_write_fence_reg(reg); 1595 i915_write_fence_reg(reg);
1592 else 1596 else
1593 i830_write_fence_reg(reg); 1597 i830_write_fence_reg(reg);
1598
1599 return 0;
1594} 1600}
1595 1601
1596/** 1602/**