Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

Conflicts:
	drivers/infiniband/hw/nes/nes_cm.c

Simple whitespace conflict.

Signed-off-by: David S. Miller <davem@davemloft.net>

17 files changed, 116 insertions, 42 deletions

diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c
index ddd70db45f76..637fcc3766c7 100644
--- a/drivers/gpu/drm/drm_ioc32.c
+++ b/drivers/gpu/drm/drm_ioc32.c
@@ -315,7 +315,8 @@ static int compat_drm_getclient(struct file *file, unsigned int cmd,
         if (err)
                 return err;
 
-        if (__get_user(c32.auth, &client->auth)
+        if (__get_user(c32.idx, &client->idx)
+            || __get_user(c32.auth, &client->auth)
             || __get_user(c32.pid, &client->pid)
             || __get_user(c32.uid, &client->uid)
             || __get_user(c32.magic, &client->magic)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b3b51c43dad0..00fbff5ddd81 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1872,7 +1872,7 @@ static void intel_update_fbc(struct drm_device *dev)
         if (enable_fbc < 0) {
                 DRM_DEBUG_KMS("fbc set to per-chip default\n");
                 enable_fbc = 1;
-                if (INTEL_INFO(dev)->gen <= 5)
+                if (INTEL_INFO(dev)->gen <= 6)
                         enable_fbc = 0;
         }
         if (!enable_fbc) {
@@ -5307,6 +5307,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
                 }
         }
 
+        pipeconf &= ~PIPECONF_INTERLACE_MASK;
         if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
                 pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
                 /* the chip adds 2 halflines automatically */
@@ -5317,7 +5318,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
                 adjusted_mode->crtc_vsync_end -= 1;
                 adjusted_mode->crtc_vsync_start -= 1;
         } else
-                pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */
+                pipeconf |= PIPECONF_PROGRESSIVE;
 
         I915_WRITE(HTOTAL(pipe),
                    (adjusted_mode->crtc_hdisplay - 1) |
@@ -5902,6 +5903,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
                 }
         }
 
+        pipeconf &= ~PIPECONF_INTERLACE_MASK;
         if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
                 pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
                 /* the chip adds 2 halflines automatically */
@@ -5912,7 +5914,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
                 adjusted_mode->crtc_vsync_end -= 1;
                 adjusted_mode->crtc_vsync_start -= 1;
         } else
-                pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
+                pipeconf |= PIPECONF_PROGRESSIVE;
 
         I915_WRITE(HTOTAL(pipe),
                    (adjusted_mode->crtc_hdisplay - 1) |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index db3b461ad412..94f860cce3f7 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -208,17 +208,8 @@ intel_dp_link_clock(uint8_t link_bw)
  */
 
 static int
-intel_dp_link_required(struct intel_dp *intel_dp, int pixel_clock, int check_bpp)
+intel_dp_link_required(int pixel_clock, int bpp)
 {
-        struct drm_crtc *crtc = intel_dp->base.base.crtc;
-        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-        int bpp = 24;
-
-        if (check_bpp)
-                bpp = check_bpp;
-        else if (intel_crtc)
-                bpp = intel_crtc->bpp;
-
         return (pixel_clock * bpp + 9) / 10;
 }
 
@@ -245,12 +236,11 @@ intel_dp_mode_valid(struct drm_connector *connector,
                         return MODE_PANEL;
         }
 
-        mode_rate = intel_dp_link_required(intel_dp, mode->clock, 0);
+        mode_rate = intel_dp_link_required(mode->clock, 24);
         max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
 
         if (mode_rate > max_rate) {
-                        mode_rate = intel_dp_link_required(intel_dp,
-                                                           mode->clock, 18);
+                        mode_rate = intel_dp_link_required(mode->clock, 18);
                         if (mode_rate > max_rate)
                                 return MODE_CLOCK_HIGH;
                         else
@@ -683,7 +673,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
         int lane_count, clock;
         int max_lane_count = intel_dp_max_lane_count(intel_dp);
         int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
-        int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 0;
+        int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
         static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
 
         if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
@@ -701,7 +691,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
                 for (clock = 0; clock <= max_clock; clock++) {
                         int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
 
-                        if (intel_dp_link_required(intel_dp, mode->clock, bpp)
+                        if (intel_dp_link_required(mode->clock, bpp)
                                         <= link_avail) {
                                 intel_dp->link_bw = bws[clock];
                                 intel_dp->lane_count = lane_count;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 798f6e1aa544..aa84832b0e1a 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -694,6 +694,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
         },
         {
                 .callback = intel_no_lvds_dmi_callback,
+                .ident = "AOpen i45GMx-I",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
+                        DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
+                },
+        },
+        {
+                .callback = intel_no_lvds_dmi_callback,
                 .ident = "Aopen i945GTt-VFA",
                 .matches = {
                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h b/drivers/gpu/drm/nouveau/nouveau_bios.h
index 1e382ad5a2b8..a37c31e358aa 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.h
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.h
@@ -54,9 +54,10 @@ struct bit_entry {
 int bit_table(struct drm_device *, u8 id, struct bit_entry *);
 
 enum dcb_gpio_tag {
-        DCB_GPIO_TVDAC0 = 0xc,
+        DCB_GPIO_PANEL_POWER = 0x01,
+        DCB_GPIO_TVDAC0 = 0x0c,
         DCB_GPIO_TVDAC1 = 0x2d,
-        DCB_GPIO_PWM_FAN = 0x9,
+        DCB_GPIO_PWM_FAN = 0x09,
         DCB_GPIO_FAN_SENSE = 0x3d,
         DCB_GPIO_UNUSED = 0xff
 };
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 3cb52bc52b21..795a9e3c990a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -219,6 +219,16 @@ nouveau_display_init(struct drm_device *dev)
         if (ret)
                 return ret;
 
+        /* power on internal panel if it's not already.  the init tables of
+         * some vbios default this to off for some reason, causing the
+         * panel to not work after resume
+         */
+        if (nouveau_gpio_func_get(dev, DCB_GPIO_PANEL_POWER) == 0) {
+                nouveau_gpio_func_set(dev, DCB_GPIO_PANEL_POWER, true);
+                msleep(300);
+        }
+
+        /* enable polling for external displays */
         drm_kms_helper_poll_enable(dev);
 
         /* enable hotplug interrupts */
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
index e4a7cfe7898d..81d7962e7252 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -124,7 +124,7 @@ MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)\n");
 int nouveau_ctxfw;
 module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
 
-MODULE_PARM_DESC(ctxfw, "Santise DCB table according to MXM-SIS\n");
+MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS\n");
 int nouveau_mxmdcb = 1;
 module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 5f0bc57fdaab..7ce3fde40743 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -380,6 +380,25 @@ retry:
 }
 
 static int
+validate_sync(struct nouveau_channel *chan, struct nouveau_bo *nvbo)
+{
+        struct nouveau_fence *fence = NULL;
+        int ret = 0;
+
+        spin_lock(&nvbo->bo.bdev->fence_lock);
+        if (nvbo->bo.sync_obj)
+                fence = nouveau_fence_ref(nvbo->bo.sync_obj);
+        spin_unlock(&nvbo->bo.bdev->fence_lock);
+
+        if (fence) {
+                ret = nouveau_fence_sync(fence, chan);
+                nouveau_fence_unref(&fence);
+        }
+
+        return ret;
+}
+
+static int
 validate_list(struct nouveau_channel *chan, struct list_head *list,
               struct drm_nouveau_gem_pushbuf_bo *pbbo, uint64_t user_pbbo_ptr)
 {
@@ -393,7 +412,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list,
         list_for_each_entry(nvbo, list, entry) {
                 struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index];
 
-                ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan);
+                ret = validate_sync(chan, nvbo);
                 if (unlikely(ret)) {
                         NV_ERROR(dev, "fail pre-validate sync\n");
                         return ret;
@@ -416,7 +435,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list,
                         return ret;
                 }
 
-                ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan);
+                ret = validate_sync(chan, nvbo);
                 if (unlikely(ret)) {
                         NV_ERROR(dev, "fail post-validate sync\n");
                         return ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_mxm.c b/drivers/gpu/drm/nouveau/nouveau_mxm.c
index 8bccddf4eff0..e5a64f0f4cb7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mxm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mxm.c
@@ -656,7 +656,16 @@ nouveau_mxm_init(struct drm_device *dev)
 
         if (mxm_shadow(dev, mxm[0])) {
                 MXM_MSG(dev, "failed to locate valid SIS\n");
+#if 0
+                /* we should, perhaps, fall back to some kind of limited
+                 * mode here if the x86 vbios hasn't already done the
+                 * work for us (so we prevent loading with completely
+                 * whacked vbios tables).
+                 */
                 return -EINVAL;
+#else
+                return 0;
+#endif
         }
 
         MXM_MSG(dev, "MXMS Version %d.%d\n",
diff --git a/drivers/gpu/drm/nouveau/nv50_pm.c b/drivers/gpu/drm/nouveau/nv50_pm.c
index 03937212e9d8..ec5481dfcd82 100644
--- a/drivers/gpu/drm/nouveau/nv50_pm.c
+++ b/drivers/gpu/drm/nouveau/nv50_pm.c
@@ -495,9 +495,9 @@ nv50_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl)
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nv50_pm_state *info;
         struct pll_lims pll;
-        int ret = -EINVAL;
+        int clk, ret = -EINVAL;
         int N, M, P1, P2;
-        u32 clk, out;
+        u32 out;
 
         if (dev_priv->chipset == 0xaa ||
             dev_priv->chipset == 0xac)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 891935271d34..742f17f009a9 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1184,7 +1184,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
         WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1);
 
         WREG32(EVERGREEN_DESKTOP_HEIGHT + radeon_crtc->crtc_offset,
-               crtc->mode.vdisplay);
+               target_fb->height);
         x &= ~3;
         y &= ~1;
         WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset,
@@ -1353,7 +1353,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
         WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1);
 
         WREG32(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset,
-               crtc->mode.vdisplay);
+               target_fb->height);
         x &= ~3;
         y &= ~1;
         WREG32(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset,
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index a71557ce01dc..552b436451fd 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -564,9 +564,21 @@ int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
             ENCODER_OBJECT_ID_NUTMEG)
                 panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE;
         else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) ==
-                 ENCODER_OBJECT_ID_TRAVIS)
-                panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
-        else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+                 ENCODER_OBJECT_ID_TRAVIS) {
+                u8 id[6];
+                int i;
+                for (i = 0; i < 6; i++)
+                        id[i] = radeon_read_dpcd_reg(radeon_connector, 0x503 + i);
+                if (id[0] == 0x73 &&
+                    id[1] == 0x69 &&
+                    id[2] == 0x76 &&
+                    id[3] == 0x61 &&
+                    id[4] == 0x72 &&
+                    id[5] == 0x54)
+                        panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE;
+                else
+                        panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
+        } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
                 u8 tmp = radeon_read_dpcd_reg(radeon_connector, DP_EDP_CONFIGURATION_CAP);
                 if (tmp & 1)
                         panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index ae09fe82afbc..9be353b894cc 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3191,6 +3191,7 @@ static int evergreen_startup(struct radeon_device *rdev)
         if (r) {
                 DRM_ERROR("radeon: failed testing IB (%d).\n", r);
                 rdev->accel_working = false;
+                return r;
         }
 
         r = r600_audio_init(rdev);
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index d996f4381130..accc032c103f 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -468,27 +468,42 @@ set_default_state(struct radeon_device *rdev)
         radeon_ring_write(ring, sq_stack_resource_mgmt_2);
 }
 
+#define I2F_MAX_BITS 15
+#define I2F_MAX_INPUT  ((1 << I2F_MAX_BITS) - 1)
+#define I2F_SHIFT (24 - I2F_MAX_BITS)
+
+/*
+ * Converts unsigned integer into 32-bit IEEE floating point representation.
+ * Conversion is not universal and only works for the range from 0
+ * to 2^I2F_MAX_BITS-1. Currently we only use it with inputs between
+ * 0 and 16384 (inclusive), so I2F_MAX_BITS=15 is enough. If necessary,
+ * I2F_MAX_BITS can be increased, but that will add to the loop iterations
+ * and slow us down. Conversion is done by shifting the input and counting
+ * down until the first 1 reaches bit position 23. The resulting counter
+ * and the shifted input are, respectively, the exponent and the fraction.
+ * The sign is always zero.
+ */
 static uint32_t i2f(uint32_t input)
 {
         u32 result, i, exponent, fraction;
 
-        if ((input & 0x3fff) == 0)
-                result = 0; /* 0 is a special case */
+        WARN_ON_ONCE(input > I2F_MAX_INPUT);
+
+        if ((input & I2F_MAX_INPUT) == 0)
+                result = 0;
         else {
-                exponent = 140; /* exponent biased by 127; */
-                fraction = (input & 0x3fff) << 10; /* cheat and only
-                                                      handle numbers below 2^^15 */
-                for (i = 0; i < 14; i++) {
+                exponent = 126 + I2F_MAX_BITS;
+                fraction = (input & I2F_MAX_INPUT) << I2F_SHIFT;
+
+                for (i = 0; i < I2F_MAX_BITS; i++) {
                         if (fraction & 0x800000)
                                 break;
                         else {
-                                fraction = fraction << 1; /* keep
-                                                             shifting left until top bit = 1 */
+                                fraction = fraction << 1;
                                 exponent = exponent - 1;
                         }
                 }
-                result = exponent << 23 | (fraction & 0x7fffff); /* mask
-                                                                    off top bit; assumed 1 */
+                result = exponent << 23 | (fraction & 0x7fffff);
         }
         return result;
 }
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
index 13ac63ba6075..98724fcb0088 100644
--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
@@ -59,8 +59,9 @@ static int radeon_atrm_call(acpi_handle atrm_handle, uint8_t *bios,
 
         obj = (union acpi_object *)buffer.pointer;
         memcpy(bios+offset, obj->buffer.pointer, obj->buffer.length);
+        len = obj->buffer.length;
         kfree(buffer.pointer);
-        return obj->buffer.length;
+        return len;
 }
 
 bool radeon_atrm_supported(struct pci_dev *pdev)
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index cec51a5b69dd..49f7cb7e226b 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -883,6 +883,8 @@ int radeon_suspend_kms(struct drm_device *dev, pm_message_t state)
         if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
                 return 0;
 
+        drm_kms_helper_poll_disable(dev);
+
         /* turn off display hw */
         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
                 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
@@ -972,6 +974,8 @@ int radeon_resume_kms(struct drm_device *dev)
         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
                 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
         }
+
+        drm_kms_helper_poll_enable(dev);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c
index e2a393ff0c44..98a8ad680109 100644
--- a/drivers/gpu/drm/radeon/radeon_i2c.c
+++ b/drivers/gpu/drm/radeon/radeon_i2c.c
@@ -958,6 +958,7 @@ struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
         i2c->rec = *rec;
         i2c->adapter.owner = THIS_MODULE;
         i2c->adapter.class = I2C_CLASS_DDC;
+        i2c->adapter.dev.parent = &dev->pdev->dev;
         i2c->dev = dev;
         snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
                  "Radeon aux bus %s", name);