aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm
diff options
context:
space:
mode:
authorVille Syrjälä <ville.syrjala@linux.intel.com>2013-08-06 15:24:05 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-08-08 08:11:10 -0400
commit1fd527cc34ed44efa4f59c01ad920479f728b707 (patch)
treedf6ecdc4faf1f9b2a143702c4234615cda2a9968 /drivers/gpu/drm
parenta9786a119d2cd0f43d5554bddda71a5fd6ee39ff (diff)
drm/i915: Rename hsw_lp_wm_result to intel_wm_level
Let's call hsw_lp_wm_result intel_wm_level from now on and move it to i915_drv.h for later use. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h8
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c20
2 files changed, 14 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d0cdec81aac3..2cfa21fbedce 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1063,6 +1063,14 @@ enum intel_ddb_partitioning {
1063 INTEL_DDB_PART_5_6, /* IVB+ */ 1063 INTEL_DDB_PART_5_6, /* IVB+ */
1064}; 1064};
1065 1065
1066struct intel_wm_level {
1067 bool enable;
1068 uint32_t pri_val;
1069 uint32_t spr_val;
1070 uint32_t cur_val;
1071 uint32_t fbc_val;
1072};
1073
1066typedef struct drm_i915_private { 1074typedef struct drm_i915_private {
1067 struct drm_device *dev; 1075 struct drm_device *dev;
1068 struct kmem_cache *slab; 1076 struct kmem_cache *slab;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b107d25282e3..d7bb61efca2d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2180,14 +2180,6 @@ struct hsw_wm_maximums {
2180 uint16_t fbc; 2180 uint16_t fbc;
2181}; 2181};
2182 2182
2183struct hsw_lp_wm_result {
2184 bool enable;
2185 uint32_t pri_val;
2186 uint32_t spr_val;
2187 uint32_t cur_val;
2188 uint32_t fbc_val;
2189};
2190
2191struct hsw_wm_values { 2183struct hsw_wm_values {
2192 uint32_t wm_pipe[3]; 2184 uint32_t wm_pipe[3];
2193 uint32_t wm_lp[3]; 2185 uint32_t wm_lp[3];
@@ -2280,7 +2272,7 @@ static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
2280 2272
2281static bool ilk_check_wm(int level, 2273static bool ilk_check_wm(int level,
2282 const struct hsw_wm_maximums *max, 2274 const struct hsw_wm_maximums *max,
2283 struct hsw_lp_wm_result *result) 2275 struct intel_wm_level *result)
2284{ 2276{
2285 bool ret; 2277 bool ret;
2286 2278
@@ -2324,7 +2316,7 @@ static bool ilk_check_wm(int level,
2324static void ilk_compute_wm_level(struct drm_i915_private *dev_priv, 2316static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
2325 int level, 2317 int level,
2326 struct hsw_pipe_wm_parameters *p, 2318 struct hsw_pipe_wm_parameters *p,
2327 struct hsw_lp_wm_result *result) 2319 struct intel_wm_level *result)
2328{ 2320{
2329 uint16_t pri_latency = dev_priv->wm.pri_latency[level]; 2321 uint16_t pri_latency = dev_priv->wm.pri_latency[level];
2330 uint16_t spr_latency = dev_priv->wm.spr_latency[level]; 2322 uint16_t spr_latency = dev_priv->wm.spr_latency[level];
@@ -2347,10 +2339,10 @@ static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
2347static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv, 2339static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
2348 int level, struct hsw_wm_maximums *max, 2340 int level, struct hsw_wm_maximums *max,
2349 struct hsw_pipe_wm_parameters *params, 2341 struct hsw_pipe_wm_parameters *params,
2350 struct hsw_lp_wm_result *result) 2342 struct intel_wm_level *result)
2351{ 2343{
2352 enum pipe pipe; 2344 enum pipe pipe;
2353 struct hsw_lp_wm_result res[3]; 2345 struct intel_wm_level res[3];
2354 2346
2355 for (pipe = PIPE_A; pipe <= PIPE_C; pipe++) 2347 for (pipe = PIPE_A; pipe <= PIPE_C; pipe++)
2356 ilk_compute_wm_level(dev_priv, level, &params[pipe], &res[pipe]); 2348 ilk_compute_wm_level(dev_priv, level, &params[pipe], &res[pipe]);
@@ -2584,7 +2576,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
2584{ 2576{
2585 struct drm_i915_private *dev_priv = dev->dev_private; 2577 struct drm_i915_private *dev_priv = dev->dev_private;
2586 struct drm_crtc *crtc; 2578 struct drm_crtc *crtc;
2587 struct hsw_lp_wm_result lp_results[4] = {}; 2579 struct intel_wm_level lp_results[4] = {};
2588 enum pipe pipe; 2580 enum pipe pipe;
2589 int level, max_level, wm_lp; 2581 int level, max_level, wm_lp;
2590 2582
@@ -2607,7 +2599,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
2607 2599
2608 memset(results, 0, sizeof(*results)); 2600 memset(results, 0, sizeof(*results));
2609 for (wm_lp = 1; wm_lp <= 3; wm_lp++) { 2601 for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
2610 const struct hsw_lp_wm_result *r; 2602 const struct intel_wm_level *r;
2611 2603
2612 level = (max_level == 4 && wm_lp > 1) ? wm_lp + 1 : wm_lp; 2604 level = (max_level == 4 && wm_lp > 1) ? wm_lp + 1 : wm_lp;
2613 if (level > max_level) 2605 if (level > max_level)