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authorDave Airlie <airlied@redhat.com>2009-07-09 19:33:00 -0400
committerDave Airlie <airlied@redhat.com>2009-07-15 03:13:16 -0400
commit77bd36f014bc5a3f28507a4e86a81b2b3d2439c3 (patch)
tree06431066e98704851383839e4f6d857b3c488d96 /drivers/gpu/drm
parent5176fdc4c5873e52f9cb6e166d80e843847e7eb4 (diff)
drm/radeon/kms: don't swap PCIEGART PTEs in VRAM.
On powerpc, since we aren't using any hw swappers, this will get flipped around by default in hw. tested on a G5 + rv515. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/radeon/r300.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 656d9238bb06..6435d659cbd1 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -154,7 +154,10 @@ int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
154 addr = (lower_32_bits(addr) >> 8) | 154 addr = (lower_32_bits(addr) >> 8) |
155 ((upper_32_bits(addr) & 0xff) << 24) | 155 ((upper_32_bits(addr) & 0xff) << 24) |
156 0xc; 156 0xc;
157 writel(cpu_to_le32(addr), ((void __iomem *)ptr) + (i * 4)); 157 /* on x86 we want this to be CPU endian, on powerpc
158 * on powerpc without HW swappers, it'll get swapped on way
159 * into VRAM - so no need for cpu_to_le32 on VRAM tables */
160 writel(addr, ((void __iomem *)ptr) + (i * 4));
158 return 0; 161 return 0;
159} 162}
160 163