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authorRafał Miłecki <zajec5@gmail.com>2010-02-20 18:15:04 -0500
committerDave Airlie <airlied@redhat.com>2010-02-22 18:46:51 -0500
commit9038dfdf699a3227004f1f6da32a3ef4ef3ba5a4 (patch)
treeaf718c7a00587ebfac1b606da5c6d5b17a4cc247 /drivers/gpu/drm
parentd03f5d5971f2dd4bd259c46e065299661d8fdc9f (diff)
drm/radeon/kms: simplify storing current and requested PM mode
We kept pointers to requested and current clock modes in every power state. That was useless, more /global/ pointers in power struct are enough. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h5
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c20
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c30
4 files changed, 25 insertions, 37 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 0ca83ca91111..fc9044edc0aa 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -652,9 +652,6 @@ struct radeon_power_state {
652 struct radeon_pm_clock_info clock_info[8]; 652 struct radeon_pm_clock_info clock_info[8];
653 /* number of valid clock modes in this power state */ 653 /* number of valid clock modes in this power state */
654 int num_clock_modes; 654 int num_clock_modes;
655 /* currently selected clock mode */
656 struct radeon_pm_clock_info *current_clock_mode;
657 struct radeon_pm_clock_info *requested_clock_mode;
658 struct radeon_pm_clock_info *default_clock_mode; 655 struct radeon_pm_clock_info *default_clock_mode;
659 /* non clock info about this state */ 656 /* non clock info about this state */
660 struct radeon_pm_non_clock_info non_clock_info; 657 struct radeon_pm_non_clock_info non_clock_info;
@@ -691,7 +688,9 @@ struct radeon_pm {
691 /* number of valid power states */ 688 /* number of valid power states */
692 int num_power_states; 689 int num_power_states;
693 struct radeon_power_state *current_power_state; 690 struct radeon_power_state *current_power_state;
691 struct radeon_pm_clock_info *current_clock_mode;
694 struct radeon_power_state *requested_power_state; 692 struct radeon_power_state *requested_power_state;
693 struct radeon_pm_clock_info *requested_clock_mode;
695 struct radeon_power_state *default_power_state; 694 struct radeon_power_state *default_power_state;
696}; 695};
697 696
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 79d445373c34..33aed6c2d41a 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -1450,7 +1450,6 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
1450 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); 1450 power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);
1451 1451
1452 rdev->pm.default_power_state = NULL; 1452 rdev->pm.default_power_state = NULL;
1453 rdev->pm.current_power_state = NULL;
1454 1453
1455 if (power_info) { 1454 if (power_info) {
1456 if (frev < 4) { 1455 if (frev < 4) {
@@ -1517,11 +1516,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
1517 rdev->pm.power_state[state_index].type = 1516 rdev->pm.power_state[state_index].type =
1518 POWER_STATE_TYPE_DEFAULT; 1517 POWER_STATE_TYPE_DEFAULT;
1519 rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; 1518 rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
1520 rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
1521 rdev->pm.power_state[state_index].default_clock_mode = 1519 rdev->pm.power_state[state_index].default_clock_mode =
1522 &rdev->pm.power_state[state_index].clock_info[0]; 1520 &rdev->pm.power_state[state_index].clock_info[0];
1523 rdev->pm.power_state[state_index].current_clock_mode =
1524 &rdev->pm.power_state[state_index].clock_info[0];
1525 } 1521 }
1526 state_index++; 1522 state_index++;
1527 break; 1523 break;
@@ -1586,11 +1582,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
1586 rdev->pm.power_state[state_index].type = 1582 rdev->pm.power_state[state_index].type =
1587 POWER_STATE_TYPE_DEFAULT; 1583 POWER_STATE_TYPE_DEFAULT;
1588 rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; 1584 rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
1589 rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
1590 rdev->pm.power_state[state_index].default_clock_mode = 1585 rdev->pm.power_state[state_index].default_clock_mode =
1591 &rdev->pm.power_state[state_index].clock_info[0]; 1586 &rdev->pm.power_state[state_index].clock_info[0];
1592 rdev->pm.power_state[state_index].current_clock_mode =
1593 &rdev->pm.power_state[state_index].clock_info[0];
1594 } 1587 }
1595 state_index++; 1588 state_index++;
1596 break; 1589 break;
@@ -1661,11 +1654,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
1661 rdev->pm.power_state[state_index].type = 1654 rdev->pm.power_state[state_index].type =
1662 POWER_STATE_TYPE_DEFAULT; 1655 POWER_STATE_TYPE_DEFAULT;
1663 rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; 1656 rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
1664 rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
1665 rdev->pm.power_state[state_index].default_clock_mode = 1657 rdev->pm.power_state[state_index].default_clock_mode =
1666 &rdev->pm.power_state[state_index].clock_info[0]; 1658 &rdev->pm.power_state[state_index].clock_info[0];
1667 rdev->pm.power_state[state_index].current_clock_mode =
1668 &rdev->pm.power_state[state_index].clock_info[0];
1669 } 1659 }
1670 state_index++; 1660 state_index++;
1671 break; 1661 break;
@@ -1765,11 +1755,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
1765 rdev->pm.power_state[state_index].type = 1755 rdev->pm.power_state[state_index].type =
1766 POWER_STATE_TYPE_DEFAULT; 1756 POWER_STATE_TYPE_DEFAULT;
1767 rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; 1757 rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
1768 rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
1769 rdev->pm.power_state[state_index].default_clock_mode = 1758 rdev->pm.power_state[state_index].default_clock_mode =
1770 &rdev->pm.power_state[state_index].clock_info[mode_index - 1]; 1759 &rdev->pm.power_state[state_index].clock_info[mode_index - 1];
1771 rdev->pm.power_state[state_index].current_clock_mode =
1772 &rdev->pm.power_state[state_index].clock_info[mode_index - 1];
1773 } 1760 }
1774 state_index++; 1761 state_index++;
1775 } 1762 }
@@ -1788,18 +1775,19 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
1788 rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; 1775 rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
1789 rdev->pm.power_state[state_index].default_clock_mode = 1776 rdev->pm.power_state[state_index].default_clock_mode =
1790 &rdev->pm.power_state[state_index].clock_info[0]; 1777 &rdev->pm.power_state[state_index].clock_info[0];
1791 rdev->pm.power_state[state_index].current_clock_mode =
1792 &rdev->pm.power_state[state_index].clock_info[0];
1793 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; 1778 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
1794 if (rdev->asic->get_pcie_lanes) 1779 if (rdev->asic->get_pcie_lanes)
1795 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev); 1780 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
1796 else 1781 else
1797 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16; 1782 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
1798 rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; 1783 rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
1799 rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
1800 state_index++; 1784 state_index++;
1801 } 1785 }
1802 rdev->pm.num_power_states = state_index; 1786 rdev->pm.num_power_states = state_index;
1787
1788 rdev->pm.current_power_state = rdev->pm.default_power_state;
1789 rdev->pm.current_clock_mode =
1790 rdev->pm.default_power_state->default_clock_mode;
1803} 1791}
1804 1792
1805void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable) 1793void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable)
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 5ef791be5036..69af81d9f5ae 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -2358,7 +2358,6 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev)
2358 int state_index = 0; 2358 int state_index = 0;
2359 2359
2360 rdev->pm.default_power_state = NULL; 2360 rdev->pm.default_power_state = NULL;
2361 rdev->pm.current_power_state = NULL;
2362 2361
2363 if (rdev->flags & RADEON_IS_MOBILITY) { 2362 if (rdev->flags & RADEON_IS_MOBILITY) {
2364 offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE); 2363 offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE);
@@ -2447,15 +2446,17 @@ default_mode:
2447 rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; 2446 rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk;
2448 rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; 2447 rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
2449 rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0]; 2448 rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0];
2450 rdev->pm.power_state[state_index].current_clock_mode = &rdev->pm.power_state[state_index].clock_info[0];
2451 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; 2449 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
2452 if (rdev->asic->get_pcie_lanes) 2450 if (rdev->asic->get_pcie_lanes)
2453 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev); 2451 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
2454 else 2452 else
2455 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16; 2453 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
2456 rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; 2454 rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
2457 rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
2458 rdev->pm.num_power_states = state_index + 1; 2455 rdev->pm.num_power_states = state_index + 1;
2456
2457 rdev->pm.current_power_state = rdev->pm.default_power_state;
2458 rdev->pm.current_clock_mode =
2459 rdev->pm.default_power_state->default_clock_mode;
2459} 2460}
2460 2461
2461void radeon_external_tmds_setup(struct drm_encoder *encoder) 2462void radeon_external_tmds_setup(struct drm_encoder *encoder)
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 6dbfdf48a5f5..8960acf14155 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -143,50 +143,50 @@ static void radeon_get_power_state(struct radeon_device *rdev,
143 enum radeon_pm_action action) 143 enum radeon_pm_action action)
144{ 144{
145 switch (action) { 145 switch (action) {
146 case PM_ACTION_NONE:
147 default:
148 rdev->pm.requested_power_state = rdev->pm.current_power_state;
149 rdev->pm.requested_power_state->requested_clock_mode =
150 rdev->pm.requested_power_state->current_clock_mode;
151 break;
152 case PM_ACTION_MINIMUM: 146 case PM_ACTION_MINIMUM:
153 rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_BATTERY); 147 rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_BATTERY);
154 rdev->pm.requested_power_state->requested_clock_mode = 148 rdev->pm.requested_clock_mode =
155 radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_LOW); 149 radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_LOW);
156 break; 150 break;
157 case PM_ACTION_DOWNCLOCK: 151 case PM_ACTION_DOWNCLOCK:
158 rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_POWERSAVE); 152 rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_POWERSAVE);
159 rdev->pm.requested_power_state->requested_clock_mode = 153 rdev->pm.requested_clock_mode =
160 radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_MID); 154 radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_MID);
161 break; 155 break;
162 case PM_ACTION_UPCLOCK: 156 case PM_ACTION_UPCLOCK:
163 rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_DEFAULT); 157 rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_DEFAULT);
164 rdev->pm.requested_power_state->requested_clock_mode = 158 rdev->pm.requested_clock_mode =
165 radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH); 159 radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH);
166 break; 160 break;
161 case PM_ACTION_NONE:
162 default:
163 DRM_ERROR("Requested mode for not defined action\n");
164 return;
167 } 165 }
168 DRM_INFO("Requested: e: %d m: %d p: %d\n", 166 DRM_INFO("Requested: e: %d m: %d p: %d\n",
169 rdev->pm.requested_power_state->requested_clock_mode->sclk, 167 rdev->pm.requested_clock_mode->sclk,
170 rdev->pm.requested_power_state->requested_clock_mode->mclk, 168 rdev->pm.requested_clock_mode->mclk,
171 rdev->pm.requested_power_state->non_clock_info.pcie_lanes); 169 rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
172} 170}
173 171
174static void radeon_set_power_state(struct radeon_device *rdev) 172static void radeon_set_power_state(struct radeon_device *rdev)
175{ 173{
176 if (rdev->pm.requested_power_state == rdev->pm.current_power_state) 174 /* if *_clock_mode are the same, *_power_state are as well */
175 if (rdev->pm.requested_clock_mode == rdev->pm.current_clock_mode)
177 return; 176 return;
178 177
179 DRM_INFO("Setting: e: %d m: %d p: %d\n", 178 DRM_INFO("Setting: e: %d m: %d p: %d\n",
180 rdev->pm.requested_power_state->requested_clock_mode->sclk, 179 rdev->pm.requested_clock_mode->sclk,
181 rdev->pm.requested_power_state->requested_clock_mode->mclk, 180 rdev->pm.requested_clock_mode->mclk,
182 rdev->pm.requested_power_state->non_clock_info.pcie_lanes); 181 rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
183 /* set pcie lanes */ 182 /* set pcie lanes */
184 /* set voltage */ 183 /* set voltage */
185 /* set engine clock */ 184 /* set engine clock */
186 radeon_set_engine_clock(rdev, rdev->pm.requested_power_state->requested_clock_mode->sclk); 185 radeon_set_engine_clock(rdev, rdev->pm.requested_clock_mode->sclk);
187 /* set memory clock */ 186 /* set memory clock */
188 187
189 rdev->pm.current_power_state = rdev->pm.requested_power_state; 188 rdev->pm.current_power_state = rdev->pm.requested_power_state;
189 rdev->pm.current_clock_mode = rdev->pm.requested_clock_mode;
190} 190}
191 191
192int radeon_pm_init(struct radeon_device *rdev) 192int radeon_pm_init(struct radeon_device *rdev)