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authorLinus Torvalds <torvalds@linux-foundation.org>2010-01-13 19:13:57 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-01-13 19:13:57 -0500
commit004b35063296b6772fa72404a35b498f1e71e87e (patch)
treea0053bdaf184ff323c69a865dc30622150628169 /drivers/gpu/drm
parent6846ee5ca68d81e6baccf0d56221d7a00c1be18b (diff)
parent194fda0dd83623f7927d505e39008c73fbc1c141 (diff)
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm: change drm set mode messages as DRM_DEBUG drm: fix crtc no modes printf + typo drm/radeon/kms: only evict to GTT if CP is ready drm/radeon/kms: Fix crash getting TV info with no BIOS. drm/radeon/kms/rv100: reject modes > 135 Mhz on DVI (v2) drm/radeon/kms/r6xx+: make irq handler less verbose drm/radeon/kms: fix up LVDS handling on macs (v2)
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c5
-rw-r--r--drivers/gpu/drm/radeon/r600.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c21
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c5
6 files changed, 42 insertions, 8 deletions
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 077313f0d47f..7d0f00a935fa 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -702,7 +702,7 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
702 if (encoder->crtc != crtc) 702 if (encoder->crtc != crtc)
703 continue; 703 continue;
704 704
705 DRM_INFO("%s: set mode %s %x\n", drm_get_encoder_name(encoder), 705 DRM_DEBUG("%s: set mode %s %x\n", drm_get_encoder_name(encoder),
706 mode->name, mode->base.id); 706 mode->name, mode->base.id);
707 encoder_funcs = encoder->helper_private; 707 encoder_funcs = encoder->helper_private;
708 encoder_funcs->mode_set(encoder, mode, adjusted_mode); 708 encoder_funcs->mode_set(encoder, mode, adjusted_mode);
@@ -1032,7 +1032,8 @@ bool drm_helper_initial_config(struct drm_device *dev)
1032 /* 1032 /*
1033 * we shouldn't end up with no modes here. 1033 * we shouldn't end up with no modes here.
1034 */ 1034 */
1035 printk(KERN_INFO "No connectors reported conncted with modes\n"); 1035 if (count == 0)
1036 printk(KERN_INFO "No connectors reported connected with modes\n");
1036 1037
1037 drm_setup_crtcs(dev); 1038 drm_setup_crtcs(dev);
1038 1039
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index c0651991c3e4..f5ff3490929f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2729,7 +2729,7 @@ restart_ih:
2729 } 2729 }
2730 break; 2730 break;
2731 default: 2731 default:
2732 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 2732 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
2733 break; 2733 break;
2734 } 2734 }
2735 break; 2735 break;
@@ -2749,7 +2749,7 @@ restart_ih:
2749 } 2749 }
2750 break; 2750 break;
2751 default: 2751 default:
2752 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 2752 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
2753 break; 2753 break;
2754 } 2754 }
2755 break; 2755 break;
@@ -2798,7 +2798,7 @@ restart_ih:
2798 } 2798 }
2799 break; 2799 break;
2800 default: 2800 default:
2801 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 2801 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
2802 break; 2802 break;
2803 } 2803 }
2804 break; 2804 break;
@@ -2812,7 +2812,7 @@ restart_ih:
2812 DRM_DEBUG("IH: CP EOP\n"); 2812 DRM_DEBUG("IH: CP EOP\n");
2813 break; 2813 break;
2814 default: 2814 default:
2815 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 2815 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
2816 break; 2816 break;
2817 } 2817 }
2818 2818
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 7914455c96ca..579c8920e081 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -687,6 +687,9 @@ radeon_combios_get_tv_info(struct radeon_device *rdev)
687 uint16_t tv_info; 687 uint16_t tv_info;
688 enum radeon_tv_std tv_std = TV_STD_NTSC; 688 enum radeon_tv_std tv_std = TV_STD_NTSC;
689 689
690 if (rdev->bios == NULL)
691 return tv_std;
692
690 tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); 693 tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE);
691 if (tv_info) { 694 if (tv_info) {
692 if (RBIOS8(tv_info + 6) == 'T') { 695 if (RBIOS8(tv_info + 6) == 'T') {
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 9da10dd5df80..55266416fa47 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -900,10 +900,18 @@ static void radeon_dvi_force(struct drm_connector *connector)
900static int radeon_dvi_mode_valid(struct drm_connector *connector, 900static int radeon_dvi_mode_valid(struct drm_connector *connector,
901 struct drm_display_mode *mode) 901 struct drm_display_mode *mode)
902{ 902{
903 struct drm_device *dev = connector->dev;
904 struct radeon_device *rdev = dev->dev_private;
903 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 905 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
904 906
905 /* XXX check mode bandwidth */ 907 /* XXX check mode bandwidth */
906 908
909 /* clocks over 135 MHz have heat issues with DVI on RV100 */
910 if (radeon_connector->use_digital &&
911 (rdev->family == CHIP_RV100) &&
912 (mode->clock > 135000))
913 return MODE_CLOCK_HIGH;
914
907 if (radeon_connector->use_digital && (mode->clock > 165000)) { 915 if (radeon_connector->use_digital && (mode->clock > 165000)) {
908 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || 916 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
909 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || 917 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 981508ff7037..38e45e231ef5 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -46,6 +46,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
46 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 46 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
47 uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; 47 uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man;
48 int panel_pwr_delay = 2000; 48 int panel_pwr_delay = 2000;
49 bool is_mac = false;
49 DRM_DEBUG("\n"); 50 DRM_DEBUG("\n");
50 51
51 if (radeon_encoder->enc_priv) { 52 if (radeon_encoder->enc_priv) {
@@ -58,6 +59,15 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
58 } 59 }
59 } 60 }
60 61
62 /* macs (and possibly some x86 oem systems?) wire up LVDS strangely
63 * Taken from radeonfb.
64 */
65 if ((rdev->mode_info.connector_table == CT_IBOOK) ||
66 (rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) ||
67 (rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) ||
68 (rdev->mode_info.connector_table == CT_POWERBOOK_VGA))
69 is_mac = true;
70
61 switch (mode) { 71 switch (mode) {
62 case DRM_MODE_DPMS_ON: 72 case DRM_MODE_DPMS_ON:
63 disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN); 73 disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN);
@@ -74,6 +84,8 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
74 84
75 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); 85 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
76 lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON); 86 lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON);
87 if (is_mac)
88 lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
77 lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS); 89 lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
78 udelay(panel_pwr_delay * 1000); 90 udelay(panel_pwr_delay * 1000);
79 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 91 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
@@ -85,7 +97,14 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
85 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); 97 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
86 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); 98 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
87 lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; 99 lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
88 lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON); 100 if (is_mac) {
101 lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN;
102 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
103 lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN);
104 } else {
105 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
106 lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
107 }
89 udelay(panel_pwr_delay * 1000); 108 udelay(panel_pwr_delay * 1000);
90 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 109 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
91 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); 110 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 3b0c07b444a2..58b5adf974ca 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -215,7 +215,10 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
215 rbo = container_of(bo, struct radeon_bo, tbo); 215 rbo = container_of(bo, struct radeon_bo, tbo);
216 switch (bo->mem.mem_type) { 216 switch (bo->mem.mem_type) {
217 case TTM_PL_VRAM: 217 case TTM_PL_VRAM:
218 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 218 if (rbo->rdev->cp.ready == false)
219 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
220 else
221 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
219 break; 222 break;
220 case TTM_PL_TT: 223 case TTM_PL_TT:
221 default: 224 default: