Merge commit 'v2.6.28-rc4' into x86/apic

7 files changed, 131 insertions, 110 deletions

diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index 0d46627663b1..78eeed5caaff 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -406,8 +406,6 @@ int drm_release(struct inode *inode, struct file *filp)
         if (dev->driver->driver_features & DRIVER_GEM)
                 drm_gem_release(dev, file_priv);
 
-        drm_fasync(-1, filp, 0);
-
         mutex_lock(&dev->ctxlist_mutex);
         if (!list_empty(&dev->ctxlist)) {
                 struct drm_ctx_list *pos, *n;
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5ba78e4fd2b5..d8fb5d8ee7ea 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -3,13 +3,14 @@
 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
 
 ccflags-y := -Iinclude/drm
-i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_opregion.o \
+i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
           i915_suspend.o \
           i915_gem.o \
           i915_gem_debug.o \
           i915_gem_proc.o \
           i915_gem_tiling.o
 
+i915-$(CONFIG_ACPI)     += i915_opregion.o
 i915-$(CONFIG_COMPAT)   += i915_ioc32.o
 
 obj-$(CONFIG_DRM_I915)  += i915.o
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 01de536e0211..256e22963ae4 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -960,6 +960,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
         DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0),
         DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0),
         DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
+        DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0),
 };
 
 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f20ffe17df71..572dcd0e3e0d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -31,6 +31,7 @@
 #define _I915_DRV_H_
 
 #include "i915_reg.h"
+#include <linux/io-mapping.h>
 
 /* General customization:
  */
@@ -246,6 +247,8 @@ typedef struct drm_i915_private {
         struct {
                 struct drm_mm gtt_space;
 
+                struct io_mapping *gtt_mapping;
+
                 /**
                  * List of objects currently involved in rendering from the
                  * ringbuffer.
@@ -502,6 +505,8 @@ int i915_gem_set_tiling(struct drm_device *dev, void *data,
                         struct drm_file *file_priv);
 int i915_gem_get_tiling(struct drm_device *dev, void *data,
                         struct drm_file *file_priv);
+int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
+                                struct drm_file *file_priv);
 void i915_gem_load(struct drm_device *dev);
 int i915_gem_proc_init(struct drm_minor *minor);
 void i915_gem_proc_cleanup(struct drm_minor *minor);
@@ -539,11 +544,18 @@ extern int i915_restore_state(struct drm_device *dev);
 extern int i915_save_state(struct drm_device *dev);
 extern int i915_restore_state(struct drm_device *dev);
 
+#ifdef CONFIG_ACPI
 /* i915_opregion.c */
 extern int intel_opregion_init(struct drm_device *dev);
 extern void intel_opregion_free(struct drm_device *dev);
 extern void opregion_asle_intr(struct drm_device *dev);
 extern void opregion_enable_asle(struct drm_device *dev);
+#else
+static inline int intel_opregion_init(struct drm_device *dev) { return 0; }
+static inline void intel_opregion_free(struct drm_device *dev) { return; }
+static inline void opregion_asle_intr(struct drm_device *dev) { return; }
+static inline void opregion_enable_asle(struct drm_device *dev) { return; }
+#endif
 
 /**
  * Lock test for when it's just for synchronization of ring access.
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 17ae330ff269..b0ec73fa6a93 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -79,6 +79,28 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data,
         return 0;
 }
 
+int
+i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
+                            struct drm_file *file_priv)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        struct drm_i915_gem_get_aperture *args = data;
+        struct drm_i915_gem_object *obj_priv;
+
+        if (!(dev->driver->driver_features & DRIVER_GEM))
+                return -ENODEV;
+
+        args->aper_size = dev->gtt_total;
+        args->aper_available_size = args->aper_size;
+
+        list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
+                if (obj_priv->pin_count > 0)
+                        args->aper_available_size -= obj_priv->obj->size;
+        }
+
+        return 0;
+}
+
 
 /**
  * Creates a new mm object and returns a handle to it.
@@ -171,35 +193,50 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
         return 0;
 }
 
-/*
- * Try to write quickly with an atomic kmap. Return true on success.
- *
- * If this fails (which includes a partial write), we'll redo the whole
- * thing with the slow version.
- *
- * This is a workaround for the low performance of iounmap (approximate
- * 10% cpu cost on normal 3D workloads).  kmap_atomic on HIGHMEM kernels
- * happens to let us map card memory without taking IPIs.  When the vmap
- * rework lands we should be able to dump this hack.
+/* This is the fast write path which cannot handle
+ * page faults in the source data
  */
-static inline int fast_user_write(unsigned long pfn, char __user *user_data,
-                                  int l, int o)
+
+static inline int
+fast_user_write(struct io_mapping *mapping,
+                loff_t page_base, int page_offset,
+                char __user *user_data,
+                int length)
 {
-#ifdef CONFIG_HIGHMEM
-        unsigned long unwritten;
         char *vaddr_atomic;
+        unsigned long unwritten;
 
-        vaddr_atomic = kmap_atomic_pfn(pfn, KM_USER0);
-#if WATCH_PWRITE
-        DRM_INFO("pwrite i %d o %d l %d pfn %ld vaddr %p\n",
-                 i, o, l, pfn, vaddr_atomic);
-#endif
-        unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + o, user_data, l);
-        kunmap_atomic(vaddr_atomic, KM_USER0);
-        return !unwritten;
-#else
+        vaddr_atomic = io_mapping_map_atomic_wc(mapping, page_base);
+        unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset,
+                                                      user_data, length);
+        io_mapping_unmap_atomic(vaddr_atomic);
+        if (unwritten)
+                return -EFAULT;
+        return 0;
+}
+
+/* Here's the write path which can sleep for
+ * page faults
+ */
+
+static inline int
+slow_user_write(struct io_mapping *mapping,
+                loff_t page_base, int page_offset,
+                char __user *user_data,
+                int length)
+{
+        char __iomem *vaddr;
+        unsigned long unwritten;
+
+        vaddr = io_mapping_map_wc(mapping, page_base);
+        if (vaddr == NULL)
+                return -EFAULT;
+        unwritten = __copy_from_user(vaddr + page_offset,
+                                     user_data, length);
+        io_mapping_unmap(vaddr);
+        if (unwritten)
+                return -EFAULT;
         return 0;
-#endif
 }
 
 static int
@@ -208,10 +245,12 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
                     struct drm_file *file_priv)
 {
         struct drm_i915_gem_object *obj_priv = obj->driver_private;
+        drm_i915_private_t *dev_priv = dev->dev_private;
         ssize_t remain;
-        loff_t offset;
+        loff_t offset, page_base;
         char __user *user_data;
-        int ret = 0;
+        int page_offset, page_length;
+        int ret;
 
         user_data = (char __user *) (uintptr_t) args->data_ptr;
         remain = args->size;
@@ -235,57 +274,37 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
         obj_priv->dirty = 1;
 
         while (remain > 0) {
-                unsigned long pfn;
-                int i, o, l;
-
                 /* Operation in this page
                  *
-                 * i = page number
-                 * o = offset within page
-                 * l = bytes to copy
+                 * page_base = page offset within aperture
+                 * page_offset = offset within page
+                 * page_length = bytes to copy for this page
                  */
-                i = offset >> PAGE_SHIFT;
-                o = offset & (PAGE_SIZE-1);
-                l = remain;
-                if ((o + l) > PAGE_SIZE)
-                        l = PAGE_SIZE - o;
-
-                pfn = (dev->agp->base >> PAGE_SHIFT) + i;
-
-                if (!fast_user_write(pfn, user_data, l, o)) {
-                        unsigned long unwritten;
-                        char __iomem *vaddr;
-
-                        vaddr = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE);
-#if WATCH_PWRITE
-                        DRM_INFO("pwrite slow i %d o %d l %d "
-                                 "pfn %ld vaddr %p\n",
-                                 i, o, l, pfn, vaddr);
-#endif
-                        if (vaddr == NULL) {
-                                ret = -EFAULT;
-                                goto fail;
-                        }
-                        unwritten = __copy_from_user(vaddr + o, user_data, l);
-#if WATCH_PWRITE
-                        DRM_INFO("unwritten %ld\n", unwritten);
-#endif
-                        iounmap(vaddr);
-                        if (unwritten) {
-                                ret = -EFAULT;
+                page_base = (offset & ~(PAGE_SIZE-1));
+                page_offset = offset & (PAGE_SIZE-1);
+                page_length = remain;
+                if ((page_offset + remain) > PAGE_SIZE)
+                        page_length = PAGE_SIZE - page_offset;
+
+                ret = fast_user_write (dev_priv->mm.gtt_mapping, page_base,
+                                       page_offset, user_data, page_length);
+
+                /* If we get a fault while copying data, then (presumably) our
+                 * source page isn't available. In this case, use the
+                 * non-atomic function
+                 */
+                if (ret) {
+                        ret = slow_user_write (dev_priv->mm.gtt_mapping,
+                                               page_base, page_offset,
+                                               user_data, page_length);
+                        if (ret)
                                 goto fail;
-                        }
                 }
 
-                remain -= l;
-                user_data += l;
-                offset += l;
+                remain -= page_length;
+                user_data += page_length;
+                offset += page_length;
         }
-#if WATCH_PWRITE && 1
-        i915_gem_clflush_object(obj);
-        i915_gem_dump_object(obj, args->offset + args->size, __func__, ~0);
-        i915_gem_clflush_object(obj);
-#endif
 
 fail:
         i915_gem_object_unpin(obj);
@@ -1503,12 +1522,12 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
                                  struct drm_i915_gem_exec_object *entry)
 {
         struct drm_device *dev = obj->dev;
+        drm_i915_private_t *dev_priv = dev->dev_private;
         struct drm_i915_gem_relocation_entry reloc;
         struct drm_i915_gem_relocation_entry __user *relocs;
         struct drm_i915_gem_object *obj_priv = obj->driver_private;
         int i, ret;
-        uint32_t last_reloc_offset = -1;
-        void __iomem *reloc_page = NULL;
+        void __iomem *reloc_page;
 
         /* Choose the GTT offset for our buffer and put it there. */
         ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment);
@@ -1631,26 +1650,11 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
                  * perform.
                  */
                 reloc_offset = obj_priv->gtt_offset + reloc.offset;
-                if (reloc_page == NULL ||
-                    (last_reloc_offset & ~(PAGE_SIZE - 1)) !=
-                    (reloc_offset & ~(PAGE_SIZE - 1))) {
-                        if (reloc_page != NULL)
-                                iounmap(reloc_page);
-
-                        reloc_page = ioremap_wc(dev->agp->base +
-                                                (reloc_offset &
-                                                 ~(PAGE_SIZE - 1)),
-                                                PAGE_SIZE);
-                        last_reloc_offset = reloc_offset;
-                        if (reloc_page == NULL) {
-                                drm_gem_object_unreference(target_obj);
-                                i915_gem_object_unpin(obj);
-                                return -ENOMEM;
-                        }
-                }
-
+                reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
+                                                      (reloc_offset &
+                                                       ~(PAGE_SIZE - 1)));
                 reloc_entry = (uint32_t __iomem *)(reloc_page +
-                                           (reloc_offset & (PAGE_SIZE - 1)));
+                                                   (reloc_offset & (PAGE_SIZE - 1)));
                 reloc_val = target_obj_priv->gtt_offset + reloc.delta;
 
 #if WATCH_BUF
@@ -1659,6 +1663,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
                           readl(reloc_entry), reloc_val);
 #endif
                 writel(reloc_val, reloc_entry);
+                io_mapping_unmap_atomic(reloc_page);
 
                 /* Write the updated presumed offset for this entry back out
                  * to the user.
@@ -1674,9 +1679,6 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
                 drm_gem_object_unreference(target_obj);
         }
 
-        if (reloc_page != NULL)
-                iounmap(reloc_page);
-
 #if WATCH_BUF
         if (0)
                 i915_gem_dump_object(obj, 128, __func__, ~0);
@@ -2518,6 +2520,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
         if (ret != 0)
                 return ret;
 
+        dev_priv->mm.gtt_mapping = io_mapping_create_wc(dev->agp->base,
+                                                        dev->agp->agp_info.aper_size
+                                                        * 1024 * 1024);
+
         mutex_lock(&dev->struct_mutex);
         BUG_ON(!list_empty(&dev_priv->mm.active_list));
         BUG_ON(!list_empty(&dev_priv->mm.flushing_list));
@@ -2535,11 +2541,13 @@ int
 i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
                        struct drm_file *file_priv)
 {
+        drm_i915_private_t *dev_priv = dev->dev_private;
         int ret;
 
         ret = i915_gem_idle(dev);
         drm_irq_uninstall(dev);
 
+        io_mapping_free(dev_priv->mm.gtt_mapping);
         return ret;
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 59a2132a8f57..073894824e6b 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -653,15 +653,16 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
         RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
 
         /* Turn on bus mastering */
-        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
-            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
             ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
-                /* rs400, rs690/rs740 */
-                tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS;
+                /* rs600/rs690/rs740 */
+                tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
                 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
-        } else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
-                    ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) {
-                /* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
+        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
+                /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
                 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
                 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
         } /* PCIE cards appears to not need this */
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 4dbb813910c3..02f5575ba395 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
  * handling, not bus mastering itself.
  */
 #define RADEON_BUS_CNTL                 0x0030
-/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
+/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
 #       define RADEON_BUS_MASTER_DIS            (1 << 6)
-/* rs400, rs690/rs740 */
-#       define RS400_BUS_MASTER_DIS             (1 << 14)
-#       define RS400_MSI_REARM                  (1 << 20)
-/* see RS480_MSI_REARM in AIC_CNTL for rs480 */
+/* rs600/rs690/rs740 */
+#       define RS600_BUS_MASTER_DIS             (1 << 14)
+#       define RS600_MSI_REARM                  (1 << 20)
+/* see RS400_MSI_REARM in AIC_CNTL for rs480 */
 
 #define RADEON_BUS_CNTL1                0x0034
 #       define RADEON_PMI_BM_DIS                (1 << 2)
@@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 
 #define RADEON_AIC_CNTL                 0x01d0
 #       define RADEON_PCIGART_TRANSLATE_EN      (1 << 0)
-#       define RS480_MSI_REARM                  (1 << 3)
+#       define RS400_MSI_REARM                  (1 << 3)
 #define RADEON_AIC_STAT                 0x01d4
 #define RADEON_AIC_PT_BASE              0x01d8
 #define RADEON_AIC_LO_ADDR              0x01dc