diff options
author | Ben Widawsky <ben@bwidawsk.net> | 2012-07-18 13:10:09 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-07-20 06:21:35 -0400 |
commit | 4f91dd6f27f015f09828e42123bdabce0c8441e6 (patch) | |
tree | 96185841ea65022008763937b25c6af61496be1b /drivers/gpu/drm | |
parent | 83bc5fd29afff5898cadf87fb29eb9260eecc63e (diff) |
drm/i915/context/: s/CTX/CXT
*sigh* the docs had it spelled wrong, corrected it, and then proceeded
to re-do the original error. The original code preserved this history,
and this patch attempts to keep in sync with the current docs.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_context.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 18 |
2 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 9ae3f2cf414e..18eee8d2522d 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c | |||
@@ -112,8 +112,8 @@ static int get_context_size(struct drm_device *dev) | |||
112 | ret = GEN6_CXT_TOTAL_SIZE(reg) * 64; | 112 | ret = GEN6_CXT_TOTAL_SIZE(reg) * 64; |
113 | break; | 113 | break; |
114 | case 7: | 114 | case 7: |
115 | reg = I915_READ(GEN7_CTX_SIZE); | 115 | reg = I915_READ(GEN7_CXT_SIZE); |
116 | ret = GEN7_CTX_TOTAL_SIZE(reg) * 64; | 116 | ret = GEN7_CXT_TOTAL_SIZE(reg) * 64; |
117 | break; | 117 | break; |
118 | default: | 118 | default: |
119 | BUG(); | 119 | BUG(); |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1218069c7f66..9019194068e8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -1482,15 +1482,15 @@ | |||
1482 | GEN6_CXT_RENDER_SIZE(cxt_reg) + \ | 1482 | GEN6_CXT_RENDER_SIZE(cxt_reg) + \ |
1483 | GEN6_CXT_EXTENDED_SIZE(cxt_reg) + \ | 1483 | GEN6_CXT_EXTENDED_SIZE(cxt_reg) + \ |
1484 | GEN6_CXT_PIPELINE_SIZE(cxt_reg)) | 1484 | GEN6_CXT_PIPELINE_SIZE(cxt_reg)) |
1485 | #define GEN7_CTX_SIZE 0x21a8 | 1485 | #define GEN7_CXT_SIZE 0x21a8 |
1486 | #define GEN7_CTX_RENDER_SIZE(ctx_reg) ((ctx_reg >> 16) & 0x3f) | 1486 | #define GEN7_CXT_RENDER_SIZE(ctx_reg) ((ctx_reg >> 16) & 0x3f) |
1487 | #define GEN7_CTX_EXTENDED_SIZE(ctx_reg) ((ctx_reg >> 9) & 0x7f) | 1487 | #define GEN7_CXT_EXTENDED_SIZE(ctx_reg) ((ctx_reg >> 9) & 0x7f) |
1488 | #define GEN7_CTX_GT1_SIZE(ctx_reg) ((ctx_reg >> 6) & 0x7) | 1488 | #define GEN7_CXT_GT1_SIZE(ctx_reg) ((ctx_reg >> 6) & 0x7) |
1489 | #define GEN7_CTX_VFSTATE_SIZE(ctx_reg) ((ctx_reg >> 0) & 0x3f) | 1489 | #define GEN7_CXT_VFSTATE_SIZE(ctx_reg) ((ctx_reg >> 0) & 0x3f) |
1490 | #define GEN7_CTX_TOTAL_SIZE(ctx_reg) (GEN7_CTX_RENDER_SIZE(ctx_reg) + \ | 1490 | #define GEN7_CXT_TOTAL_SIZE(ctx_reg) (GEN7_CXT_RENDER_SIZE(ctx_reg) + \ |
1491 | GEN7_CTX_EXTENDED_SIZE(ctx_reg) + \ | 1491 | GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \ |
1492 | GEN7_CTX_GT1_SIZE(ctx_reg) + \ | 1492 | GEN7_CXT_GT1_SIZE(ctx_reg) + \ |
1493 | GEN7_CTX_VFSTATE_SIZE(ctx_reg)) | 1493 | GEN7_CXT_VFSTATE_SIZE(ctx_reg)) |
1494 | 1494 | ||
1495 | /* | 1495 | /* |
1496 | * Overlay regs | 1496 | * Overlay regs |