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authorThomas Hellstrom <thellstrom@vmware.com>2011-10-10 06:23:26 -0400
committerDave Airlie <airlied@redhat.com>2011-10-10 10:46:55 -0400
commit57c5ee79acba9582762c09c269e0e2ae1adf1b31 (patch)
tree26b2148b81e7a7c1785d9d07d45c68bb1117bfb5 /drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
parent8bf445cee3127de3779a395d08d1ada2ad70161e (diff)
vmwgfx: Add fence events
Add a way to send DRM events down the gpu fifo by attaching them to fence objects. This may be useful for Xserver swapbuffer throttling and page-flip done notifications. Bump version to 2.2 to signal the availability of the FENCE_EVENT ioctl. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c')
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
index 62d6377b8ee8..03bbc2a6f9a7 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
@@ -247,9 +247,8 @@ static int vmw_fifo_wait(struct vmw_private *dev_priv,
247 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags); 247 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
248 outl(SVGA_IRQFLAG_FIFO_PROGRESS, 248 outl(SVGA_IRQFLAG_FIFO_PROGRESS,
249 dev_priv->io_start + VMWGFX_IRQSTATUS_PORT); 249 dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
250 vmw_write(dev_priv, SVGA_REG_IRQMASK, 250 dev_priv->irq_mask |= SVGA_IRQFLAG_FIFO_PROGRESS;
251 vmw_read(dev_priv, SVGA_REG_IRQMASK) | 251 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask);
252 SVGA_IRQFLAG_FIFO_PROGRESS);
253 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags); 252 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
254 } 253 }
255 mutex_unlock(&dev_priv->hw_mutex); 254 mutex_unlock(&dev_priv->hw_mutex);
@@ -271,9 +270,8 @@ static int vmw_fifo_wait(struct vmw_private *dev_priv,
271 mutex_lock(&dev_priv->hw_mutex); 270 mutex_lock(&dev_priv->hw_mutex);
272 if (atomic_dec_and_test(&dev_priv->fifo_queue_waiters)) { 271 if (atomic_dec_and_test(&dev_priv->fifo_queue_waiters)) {
273 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags); 272 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
274 vmw_write(dev_priv, SVGA_REG_IRQMASK, 273 dev_priv->irq_mask &= ~SVGA_IRQFLAG_FIFO_PROGRESS;
275 vmw_read(dev_priv, SVGA_REG_IRQMASK) & 274 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask);
276 ~SVGA_IRQFLAG_FIFO_PROGRESS);
277 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags); 275 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
278 } 276 }
279 mutex_unlock(&dev_priv->hw_mutex); 277 mutex_unlock(&dev_priv->hw_mutex);