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authorThomas Hellstrom <thellstrom@vmware.com>2009-12-07 12:36:19 -0500
committerDave Airlie <airlied@redhat.com>2009-12-10 00:09:03 -0500
commit5cc6fbab9da5680e7e5d2507d0f0c2c52ff18031 (patch)
tree0754b2bc4fd022f055baa280213c1a33db48cb4a /drivers/gpu/drm/radeon
parent98ffc4158e12008102cb6ae242a7fc46f9243f0d (diff)
drm/radeon: Remove tests for -ERESTART from the TTM code.
Also sets affected TTM calls up to not wait interruptible, since that would cause an in-kernel spin until the TTM call succeeds, since the Radeon code does not return to user-space when a signal is received. Modifies interruptible fence waits to return -ERESTARTSYS rather than -EBUSY when interrupted by a signal, since that's the (yet undocumented) semantics required by the TTM sync object hooks. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r--drivers/gpu/drm/radeon/radeon_fence.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c38
2 files changed, 14 insertions, 29 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index 2ac31633d72c..78743cd70433 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -197,9 +197,8 @@ retry:
197 r = wait_event_interruptible_timeout(rdev->fence_drv.queue, 197 r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
198 radeon_fence_signaled(fence), timeout); 198 radeon_fence_signaled(fence), timeout);
199 radeon_irq_kms_sw_irq_put(rdev); 199 radeon_irq_kms_sw_irq_put(rdev);
200 if (unlikely(r == -ERESTARTSYS)) { 200 if (unlikely(r != 0))
201 return -EBUSY; 201 return r;
202 }
203 } else { 202 } else {
204 radeon_irq_kms_sw_irq_get(rdev); 203 radeon_irq_kms_sw_irq_get(rdev);
205 r = wait_event_timeout(rdev->fence_drv.queue, 204 r = wait_event_timeout(rdev->fence_drv.queue,
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index d9b239bce12a..ca172adfddb1 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -121,16 +121,15 @@ int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
121 INIT_LIST_HEAD(&bo->list); 121 INIT_LIST_HEAD(&bo->list);
122 122
123 flags = radeon_ttm_flags_from_domain(domain); 123 flags = radeon_ttm_flags_from_domain(domain);
124retry: 124 /* Kernel allocation are uninterruptible */
125 r = ttm_buffer_object_init(&rdev->mman.bdev, &bo->tbo, size, type, 125 r = ttm_buffer_object_init(&rdev->mman.bdev, &bo->tbo, size, type,
126 flags, 0, 0, true, NULL, size, 126 flags, 0, 0, !kernel, NULL, size,
127 &radeon_ttm_bo_destroy); 127 &radeon_ttm_bo_destroy);
128 if (unlikely(r != 0)) { 128 if (unlikely(r != 0)) {
129 if (r == -ERESTART) 129 if (r != -ERESTARTSYS)
130 goto retry; 130 dev_err(rdev->dev,
131 /* ttm call radeon_ttm_object_object_destroy if error happen */ 131 "object_init failed for (%ld, 0x%08X)\n",
132 dev_err(rdev->dev, "object_init failed for (%ld, 0x%08X)\n", 132 size, flags);
133 size, flags);
134 return r; 133 return r;
135 } 134 }
136 *bo_ptr = bo; 135 *bo_ptr = bo;
@@ -200,18 +199,14 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
200 radeon_ttm_placement_from_domain(bo, domain); 199 radeon_ttm_placement_from_domain(bo, domain);
201 for (i = 0; i < bo->placement.num_placement; i++) 200 for (i = 0; i < bo->placement.num_placement; i++)
202 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT; 201 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
203retry: 202 r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, false, false);
204 r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, true, false);
205 if (likely(r == 0)) { 203 if (likely(r == 0)) {
206 bo->pin_count = 1; 204 bo->pin_count = 1;
207 if (gpu_addr != NULL) 205 if (gpu_addr != NULL)
208 *gpu_addr = radeon_bo_gpu_offset(bo); 206 *gpu_addr = radeon_bo_gpu_offset(bo);
209 } 207 }
210 if (unlikely(r != 0)) { 208 if (unlikely(r != 0))
211 if (r == -ERESTART)
212 goto retry;
213 dev_err(bo->rdev->dev, "%p pin failed\n", bo); 209 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
214 }
215 return r; 210 return r;
216} 211}
217 212
@@ -228,15 +223,10 @@ int radeon_bo_unpin(struct radeon_bo *bo)
228 return 0; 223 return 0;
229 for (i = 0; i < bo->placement.num_placement; i++) 224 for (i = 0; i < bo->placement.num_placement; i++)
230 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; 225 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
231retry: 226 r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, false, false);
232 r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, true, false); 227 if (unlikely(r != 0))
233 if (unlikely(r != 0)) {
234 if (r == -ERESTART)
235 goto retry;
236 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo); 228 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
237 return r; 229 return r;
238 }
239 return 0;
240} 230}
241 231
242int radeon_bo_evict_vram(struct radeon_device *rdev) 232int radeon_bo_evict_vram(struct radeon_device *rdev)
@@ -346,15 +336,11 @@ int radeon_bo_list_validate(struct list_head *head, void *fence)
346 radeon_ttm_placement_from_domain(bo, 336 radeon_ttm_placement_from_domain(bo,
347 lobj->rdomain); 337 lobj->rdomain);
348 } 338 }
349retry:
350 r = ttm_buffer_object_validate(&bo->tbo, 339 r = ttm_buffer_object_validate(&bo->tbo,
351 &bo->placement, 340 &bo->placement,
352 true, false); 341 true, false);
353 if (unlikely(r)) { 342 if (unlikely(r))
354 if (r == -ERESTART)
355 goto retry;
356 return r; 343 return r;
357 }
358 } 344 }
359 lobj->gpu_offset = radeon_bo_gpu_offset(bo); 345 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
360 lobj->tiling_flags = bo->tiling_flags; 346 lobj->tiling_flags = bo->tiling_flags;