diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-01-24 15:00:17 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-01-31 16:24:58 -0500 |
commit | 24178ec42b0985d485886bc43b97e54ff173627e (patch) | |
tree | 7179ec2f9c917fb36477feb4a12e0d9b53c6e22d /drivers/gpu/drm/radeon | |
parent | 123bc1832c33218dfa677a88c2c54bc1a48a9e72 (diff) |
drm/radeon: don't reset the MC on IGPs/APUs
The MC isn't part of the GPU per se.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 6 |
3 files changed, 12 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 045955d5f337..2916de896a60 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -2500,8 +2500,10 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
2500 | if (reset_mask & RADEON_RESET_VMC) | 2500 | if (reset_mask & RADEON_RESET_VMC) |
2501 | srbm_soft_reset |= SOFT_RESET_VMC; | 2501 | srbm_soft_reset |= SOFT_RESET_VMC; |
2502 | 2502 | ||
2503 | if (reset_mask & RADEON_RESET_MC) | 2503 | if (!(rdev->flags & RADEON_IS_IGP)) { |
2504 | srbm_soft_reset |= SOFT_RESET_MC; | 2504 | if (reset_mask & RADEON_RESET_MC) |
2505 | srbm_soft_reset |= SOFT_RESET_MC; | ||
2506 | } | ||
2505 | 2507 | ||
2506 | if (grbm_soft_reset) { | 2508 | if (grbm_soft_reset) { |
2507 | tmp = RREG32(GRBM_SOFT_RESET); | 2509 | tmp = RREG32(GRBM_SOFT_RESET); |
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index b6e80550ed90..170bd03d4dd8 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -1474,8 +1474,10 @@ static void cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
1474 | if (reset_mask & RADEON_RESET_VMC) | 1474 | if (reset_mask & RADEON_RESET_VMC) |
1475 | srbm_soft_reset |= SOFT_RESET_VMC; | 1475 | srbm_soft_reset |= SOFT_RESET_VMC; |
1476 | 1476 | ||
1477 | if (reset_mask & RADEON_RESET_MC) | 1477 | if (!(rdev->flags & RADEON_IS_IGP)) { |
1478 | srbm_soft_reset |= SOFT_RESET_MC; | 1478 | if (reset_mask & RADEON_RESET_MC) |
1479 | srbm_soft_reset |= SOFT_RESET_MC; | ||
1480 | } | ||
1479 | 1481 | ||
1480 | if (grbm_soft_reset) { | 1482 | if (grbm_soft_reset) { |
1481 | tmp = RREG32(GRBM_SOFT_RESET); | 1483 | tmp = RREG32(GRBM_SOFT_RESET); |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 3f292765aea8..dbcb0752f083 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1475,8 +1475,10 @@ static void r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
1475 | if (reset_mask & RADEON_RESET_GRBM) | 1475 | if (reset_mask & RADEON_RESET_GRBM) |
1476 | srbm_soft_reset |= S_000E60_SOFT_RESET_GRBM(1); | 1476 | srbm_soft_reset |= S_000E60_SOFT_RESET_GRBM(1); |
1477 | 1477 | ||
1478 | if (reset_mask & RADEON_RESET_MC) | 1478 | if (!(rdev->flags & RADEON_IS_IGP)) { |
1479 | srbm_soft_reset |= S_000E60_SOFT_RESET_MC(1); | 1479 | if (reset_mask & RADEON_RESET_MC) |
1480 | srbm_soft_reset |= S_000E60_SOFT_RESET_MC(1); | ||
1481 | } | ||
1480 | 1482 | ||
1481 | if (reset_mask & RADEON_RESET_VMC) | 1483 | if (reset_mask & RADEON_RESET_VMC) |
1482 | srbm_soft_reset |= S_000E60_SOFT_RESET_VMC(1); | 1484 | srbm_soft_reset |= S_000E60_SOFT_RESET_VMC(1); |