drm/radeon/kms: check for DP MST mode in a few more places (v2)

DP MST is DP multi-stream support, part of DP 1.2.

v2: switch to a helper macro as suggested by Michel.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

3 files changed, 14 insertions, 13 deletions

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 9bb3d6f3b7be..87921c88a95c 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -638,7 +638,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
                                 if (ss_enabled && ss->percentage)
                                         args.v3.sInput.ucDispPllConfig |=
                                                 DISPPLL_CONFIG_SS_ENABLE;
-                                if (encoder_mode == ATOM_ENCODER_MODE_DP) {
+                                if (ENCODER_MODE_IS_DP(encoder_mode)) {
                                         args.v3.sInput.ucDispPllConfig |=
                                                 DISPPLL_CONFIG_COHERENT_MODE;
                                         /* 16200 or 27000 */
@@ -930,6 +930,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
                 bpc = connector->display_info.bpc;
 
                 switch (encoder_mode) {
+                case ATOM_ENCODER_MODE_DP_MST:
                 case ATOM_ENCODER_MODE_DP:
                         /* DP/eDP */
                         dp_clock = dig_connector->dp_clock / 10;
@@ -1435,7 +1436,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
                                  * PPLL/DCPLL programming and only program the DP DTO for the
                                  * crtc virtual pixel clock.
                                  */
-                                if (atombios_get_encoder_mode(test_encoder) == ATOM_ENCODER_MODE_DP) {
+                                if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_encoder))) {
                                         if (ASIC_IS_DCE5(rdev) || rdev->clock.dp_extclk)
                                                 return ATOM_PPLL_INVALID;
                                 }
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index f01b6b135b99..e57fd6dab4ba 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -834,8 +834,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo
         else
                 args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
 
-        if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) ||
-            (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST))
+        if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode))
                 args.v1.ucLaneNum = dp_lane_count;
         else if (radeon_encoder->pixel_clock > 165000)
                 args.v1.ucLaneNum = 8;
@@ -843,8 +842,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo
                 args.v1.ucLaneNum = 4;
 
         if (ASIC_IS_DCE5(rdev)) {
-                if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) ||
-                    (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST)) {
+                if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode)) {
                         if (dp_clock == 270000)
                                 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V4_DPLINKRATE_2_70GHZ;
                         else if (dp_clock == 540000)
@@ -877,7 +875,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo
                 else
                         args.v4.ucHPD_ID = hpd_id + 1;
         } else if (ASIC_IS_DCE4(rdev)) {
-                if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) && (dp_clock == 270000))
+                if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000))
                         args.v1.ucConfig |= ATOM_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ;
                 args.v3.acConfig.ucDigSel = dig->dig_encoder;
                 switch (bpc) {
@@ -902,7 +900,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mo
                         break;
                 }
         } else {
-                if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) && (dp_clock == 270000))
+                if (ENCODER_MODE_IS_DP(args.v1.ucEncoderMode) && (dp_clock == 270000))
                         args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
                 switch (radeon_encoder->encoder_id) {
                 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
@@ -977,7 +975,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
         if (dig_encoder == -1)
                 return;
 
-        if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP)
+        if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)))
                 is_dp = true;
 
         memset(&args, 0, sizeof(args));
@@ -1246,7 +1244,7 @@ atombios_external_encoder_setup(struct drm_encoder *encoder,
                         args.v1.sDigEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
                         args.v1.sDigEncoder.ucEncoderMode = atombios_get_encoder_mode(encoder);
 
-                        if (args.v1.sDigEncoder.ucEncoderMode == ATOM_ENCODER_MODE_DP) {
+                        if (ENCODER_MODE_IS_DP(args.v1.sDigEncoder.ucEncoderMode)) {
                                 if (dp_clock == 270000)
                                         args.v1.sDigEncoder.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
                                 args.v1.sDigEncoder.ucLaneNum = dp_lane_count;
@@ -1263,7 +1261,7 @@ atombios_external_encoder_setup(struct drm_encoder *encoder,
                                 args.v3.sExtEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
                         args.v3.sExtEncoder.ucEncoderMode = atombios_get_encoder_mode(encoder);
 
-                        if (args.v3.sExtEncoder.ucEncoderMode == ATOM_ENCODER_MODE_DP) {
+                        if (ENCODER_MODE_IS_DP(args.v3.sExtEncoder.ucEncoderMode)) {
                                 if (dp_clock == 270000)
                                         args.v3.sExtEncoder.ucConfig |= EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_2_70GHZ;
                                 else if (dp_clock == 540000)
@@ -1458,7 +1456,7 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
                         atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
                 else
                         atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
-                if ((atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) && connector) {
+                if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
                         if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
                                 atombios_set_edp_panel_power(connector,
                                                              ATOM_TRANSMITTER_ACTION_POWER_ON);
@@ -1477,7 +1475,7 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
         case DRM_MODE_DPMS_SUSPEND:
         case DRM_MODE_DPMS_OFF:
                 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0);
-                if ((atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) && connector) {
+                if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
                         if (ASIC_IS_DCE4(rdev))
                                 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
                         if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index cbf80de2d9c6..f8e18a904e37 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -459,6 +459,8 @@ struct radeon_framebuffer {
         struct drm_gem_object *obj;
 };
 
+#define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
+                                ((em) == ATOM_ENCODER_MODE_DP_MST))
 
 extern enum radeon_tv_std
 radeon_combios_get_tv_info(struct radeon_device *rdev);