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authorChristian König <christian.koenig@amd.com>2014-05-27 10:49:21 -0400
committerAlex Deucher <alexander.deucher@amd.com>2014-06-02 10:25:12 -0400
commit1a0e79184132c5dc0e03a4047eacecc52c24deae (patch)
tree38211a82699c5a0c38c5b14a29d95bfebba14be4 /drivers/gpu/drm/radeon
parent157fa14dc4065ce7536473e643c95385d87bd580 (diff)
drm/radeon: separate vblank and pflip crtc handling
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r--drivers/gpu/drm/radeon/cik.c12
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c12
-rw-r--r--drivers/gpu/drm/radeon/r100.c4
-rw-r--r--drivers/gpu/drm/radeon/r600.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c33
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h1
-rw-r--r--drivers/gpu/drm/radeon/rs600.c4
-rw-r--r--drivers/gpu/drm/radeon/si.c12
8 files changed, 56 insertions, 26 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 8d0f1774efbc..a5181404f130 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -7314,7 +7314,7 @@ restart_ih:
7314 wake_up(&rdev->irq.vblank_queue); 7314 wake_up(&rdev->irq.vblank_queue);
7315 } 7315 }
7316 if (atomic_read(&rdev->irq.pflip[0])) 7316 if (atomic_read(&rdev->irq.pflip[0]))
7317 radeon_crtc_handle_flip(rdev, 0); 7317 radeon_crtc_handle_vblank(rdev, 0);
7318 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; 7318 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
7319 DRM_DEBUG("IH: D1 vblank\n"); 7319 DRM_DEBUG("IH: D1 vblank\n");
7320 } 7320 }
@@ -7340,7 +7340,7 @@ restart_ih:
7340 wake_up(&rdev->irq.vblank_queue); 7340 wake_up(&rdev->irq.vblank_queue);
7341 } 7341 }
7342 if (atomic_read(&rdev->irq.pflip[1])) 7342 if (atomic_read(&rdev->irq.pflip[1]))
7343 radeon_crtc_handle_flip(rdev, 1); 7343 radeon_crtc_handle_vblank(rdev, 1);
7344 rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT; 7344 rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
7345 DRM_DEBUG("IH: D2 vblank\n"); 7345 DRM_DEBUG("IH: D2 vblank\n");
7346 } 7346 }
@@ -7366,7 +7366,7 @@ restart_ih:
7366 wake_up(&rdev->irq.vblank_queue); 7366 wake_up(&rdev->irq.vblank_queue);
7367 } 7367 }
7368 if (atomic_read(&rdev->irq.pflip[2])) 7368 if (atomic_read(&rdev->irq.pflip[2]))
7369 radeon_crtc_handle_flip(rdev, 2); 7369 radeon_crtc_handle_vblank(rdev, 2);
7370 rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT; 7370 rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
7371 DRM_DEBUG("IH: D3 vblank\n"); 7371 DRM_DEBUG("IH: D3 vblank\n");
7372 } 7372 }
@@ -7392,7 +7392,7 @@ restart_ih:
7392 wake_up(&rdev->irq.vblank_queue); 7392 wake_up(&rdev->irq.vblank_queue);
7393 } 7393 }
7394 if (atomic_read(&rdev->irq.pflip[3])) 7394 if (atomic_read(&rdev->irq.pflip[3]))
7395 radeon_crtc_handle_flip(rdev, 3); 7395 radeon_crtc_handle_vblank(rdev, 3);
7396 rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT; 7396 rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
7397 DRM_DEBUG("IH: D4 vblank\n"); 7397 DRM_DEBUG("IH: D4 vblank\n");
7398 } 7398 }
@@ -7418,7 +7418,7 @@ restart_ih:
7418 wake_up(&rdev->irq.vblank_queue); 7418 wake_up(&rdev->irq.vblank_queue);
7419 } 7419 }
7420 if (atomic_read(&rdev->irq.pflip[4])) 7420 if (atomic_read(&rdev->irq.pflip[4]))
7421 radeon_crtc_handle_flip(rdev, 4); 7421 radeon_crtc_handle_vblank(rdev, 4);
7422 rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT; 7422 rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
7423 DRM_DEBUG("IH: D5 vblank\n"); 7423 DRM_DEBUG("IH: D5 vblank\n");
7424 } 7424 }
@@ -7444,7 +7444,7 @@ restart_ih:
7444 wake_up(&rdev->irq.vblank_queue); 7444 wake_up(&rdev->irq.vblank_queue);
7445 } 7445 }
7446 if (atomic_read(&rdev->irq.pflip[5])) 7446 if (atomic_read(&rdev->irq.pflip[5]))
7447 radeon_crtc_handle_flip(rdev, 5); 7447 radeon_crtc_handle_vblank(rdev, 5);
7448 rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT; 7448 rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
7449 DRM_DEBUG("IH: D6 vblank\n"); 7449 DRM_DEBUG("IH: D6 vblank\n");
7450 } 7450 }
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 336f0a56edce..0318230ef274 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4789,7 +4789,7 @@ restart_ih:
4789 wake_up(&rdev->irq.vblank_queue); 4789 wake_up(&rdev->irq.vblank_queue);
4790 } 4790 }
4791 if (atomic_read(&rdev->irq.pflip[0])) 4791 if (atomic_read(&rdev->irq.pflip[0]))
4792 radeon_crtc_handle_flip(rdev, 0); 4792 radeon_crtc_handle_vblank(rdev, 0);
4793 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT; 4793 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
4794 DRM_DEBUG("IH: D1 vblank\n"); 4794 DRM_DEBUG("IH: D1 vblank\n");
4795 } 4795 }
@@ -4815,7 +4815,7 @@ restart_ih:
4815 wake_up(&rdev->irq.vblank_queue); 4815 wake_up(&rdev->irq.vblank_queue);
4816 } 4816 }
4817 if (atomic_read(&rdev->irq.pflip[1])) 4817 if (atomic_read(&rdev->irq.pflip[1]))
4818 radeon_crtc_handle_flip(rdev, 1); 4818 radeon_crtc_handle_vblank(rdev, 1);
4819 rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT; 4819 rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
4820 DRM_DEBUG("IH: D2 vblank\n"); 4820 DRM_DEBUG("IH: D2 vblank\n");
4821 } 4821 }
@@ -4841,7 +4841,7 @@ restart_ih:
4841 wake_up(&rdev->irq.vblank_queue); 4841 wake_up(&rdev->irq.vblank_queue);
4842 } 4842 }
4843 if (atomic_read(&rdev->irq.pflip[2])) 4843 if (atomic_read(&rdev->irq.pflip[2]))
4844 radeon_crtc_handle_flip(rdev, 2); 4844 radeon_crtc_handle_vblank(rdev, 2);
4845 rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT; 4845 rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
4846 DRM_DEBUG("IH: D3 vblank\n"); 4846 DRM_DEBUG("IH: D3 vblank\n");
4847 } 4847 }
@@ -4867,7 +4867,7 @@ restart_ih:
4867 wake_up(&rdev->irq.vblank_queue); 4867 wake_up(&rdev->irq.vblank_queue);
4868 } 4868 }
4869 if (atomic_read(&rdev->irq.pflip[3])) 4869 if (atomic_read(&rdev->irq.pflip[3]))
4870 radeon_crtc_handle_flip(rdev, 3); 4870 radeon_crtc_handle_vblank(rdev, 3);
4871 rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT; 4871 rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
4872 DRM_DEBUG("IH: D4 vblank\n"); 4872 DRM_DEBUG("IH: D4 vblank\n");
4873 } 4873 }
@@ -4893,7 +4893,7 @@ restart_ih:
4893 wake_up(&rdev->irq.vblank_queue); 4893 wake_up(&rdev->irq.vblank_queue);
4894 } 4894 }
4895 if (atomic_read(&rdev->irq.pflip[4])) 4895 if (atomic_read(&rdev->irq.pflip[4]))
4896 radeon_crtc_handle_flip(rdev, 4); 4896 radeon_crtc_handle_vblank(rdev, 4);
4897 rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT; 4897 rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
4898 DRM_DEBUG("IH: D5 vblank\n"); 4898 DRM_DEBUG("IH: D5 vblank\n");
4899 } 4899 }
@@ -4919,7 +4919,7 @@ restart_ih:
4919 wake_up(&rdev->irq.vblank_queue); 4919 wake_up(&rdev->irq.vblank_queue);
4920 } 4920 }
4921 if (atomic_read(&rdev->irq.pflip[5])) 4921 if (atomic_read(&rdev->irq.pflip[5]))
4922 radeon_crtc_handle_flip(rdev, 5); 4922 radeon_crtc_handle_vblank(rdev, 5);
4923 rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT; 4923 rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
4924 DRM_DEBUG("IH: D6 vblank\n"); 4924 DRM_DEBUG("IH: D6 vblank\n");
4925 } 4925 }
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 52548f7bbb5a..ad99813cfa8f 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -779,7 +779,7 @@ int r100_irq_process(struct radeon_device *rdev)
779 wake_up(&rdev->irq.vblank_queue); 779 wake_up(&rdev->irq.vblank_queue);
780 } 780 }
781 if (atomic_read(&rdev->irq.pflip[0])) 781 if (atomic_read(&rdev->irq.pflip[0]))
782 radeon_crtc_handle_flip(rdev, 0); 782 radeon_crtc_handle_vblank(rdev, 0);
783 } 783 }
784 if (status & RADEON_CRTC2_VBLANK_STAT) { 784 if (status & RADEON_CRTC2_VBLANK_STAT) {
785 if (rdev->irq.crtc_vblank_int[1]) { 785 if (rdev->irq.crtc_vblank_int[1]) {
@@ -788,7 +788,7 @@ int r100_irq_process(struct radeon_device *rdev)
788 wake_up(&rdev->irq.vblank_queue); 788 wake_up(&rdev->irq.vblank_queue);
789 } 789 }
790 if (atomic_read(&rdev->irq.pflip[1])) 790 if (atomic_read(&rdev->irq.pflip[1]))
791 radeon_crtc_handle_flip(rdev, 1); 791 radeon_crtc_handle_vblank(rdev, 1);
792 } 792 }
793 if (status & RADEON_FP_DETECT_STAT) { 793 if (status & RADEON_FP_DETECT_STAT) {
794 queue_hotplug = true; 794 queue_hotplug = true;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 6e887d004eba..436e55092e9d 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3876,7 +3876,7 @@ restart_ih:
3876 wake_up(&rdev->irq.vblank_queue); 3876 wake_up(&rdev->irq.vblank_queue);
3877 } 3877 }
3878 if (atomic_read(&rdev->irq.pflip[0])) 3878 if (atomic_read(&rdev->irq.pflip[0]))
3879 radeon_crtc_handle_flip(rdev, 0); 3879 radeon_crtc_handle_vblank(rdev, 0);
3880 rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT; 3880 rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
3881 DRM_DEBUG("IH: D1 vblank\n"); 3881 DRM_DEBUG("IH: D1 vblank\n");
3882 } 3882 }
@@ -3902,7 +3902,7 @@ restart_ih:
3902 wake_up(&rdev->irq.vblank_queue); 3902 wake_up(&rdev->irq.vblank_queue);
3903 } 3903 }
3904 if (atomic_read(&rdev->irq.pflip[1])) 3904 if (atomic_read(&rdev->irq.pflip[1]))
3905 radeon_crtc_handle_flip(rdev, 1); 3905 radeon_crtc_handle_vblank(rdev, 1);
3906 rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VBLANK_INTERRUPT; 3906 rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VBLANK_INTERRUPT;
3907 DRM_DEBUG("IH: D2 vblank\n"); 3907 DRM_DEBUG("IH: D2 vblank\n");
3908 } 3908 }
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index c52c18246ed7..88e3cbe11dad 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -276,7 +276,7 @@ static void radeon_unpin_work_func(struct work_struct *__work)
276 kfree(work); 276 kfree(work);
277} 277}
278 278
279void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) 279void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id)
280{ 280{
281 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; 281 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
282 struct radeon_unpin_work *work; 282 struct radeon_unpin_work *work;
@@ -302,7 +302,6 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
302 * completion routine. 302 * completion routine.
303 */ 303 */
304 update_pending = 0; 304 update_pending = 0;
305 radeon_crtc->deferred_flip_completion = 0;
306 } 305 }
307 306
308 /* Has the pageflip already completed in crtc, or is it certain 307 /* Has the pageflip already completed in crtc, or is it certain
@@ -330,10 +329,40 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
330 radeon_crtc->deferred_flip_completion = 1; 329 radeon_crtc->deferred_flip_completion = 1;
331 spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); 330 spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
332 return; 331 return;
332 } else {
333 spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
334 radeon_crtc_handle_flip(rdev, crtc_id);
335 }
336}
337
338/**
339 * radeon_crtc_handle_flip - page flip completed
340 *
341 * @rdev: radeon device pointer
342 * @crtc_id: crtc number this event is for
343 *
344 * Called when we are sure that a page flip for this crtc is completed.
345 */
346void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
347{
348 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
349 struct radeon_unpin_work *work;
350 unsigned long flags;
351
352 /* this can happen at init */
353 if (radeon_crtc == NULL)
354 return;
355
356 spin_lock_irqsave(&rdev->ddev->event_lock, flags);
357 work = radeon_crtc->unpin_work;
358 if (work == NULL) {
359 spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
360 return;
333 } 361 }
334 362
335 /* Pageflip (will be) certainly completed in this vblank. Clean up. */ 363 /* Pageflip (will be) certainly completed in this vblank. Clean up. */
336 radeon_crtc->unpin_work = NULL; 364 radeon_crtc->unpin_work = NULL;
365 radeon_crtc->deferred_flip_completion = 0;
337 366
338 /* wakeup userspace */ 367 /* wakeup userspace */
339 if (work->event) 368 if (work->event)
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index b265a8b95fe6..718be1a932ac 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -907,6 +907,7 @@ bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
907 907
908void radeon_fb_output_poll_changed(struct radeon_device *rdev); 908void radeon_fb_output_poll_changed(struct radeon_device *rdev);
909 909
910void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id);
910void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id); 911void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
911 912
912int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled); 913int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 9922ee5bd497..dd12dc2a0104 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -781,7 +781,7 @@ int rs600_irq_process(struct radeon_device *rdev)
781 wake_up(&rdev->irq.vblank_queue); 781 wake_up(&rdev->irq.vblank_queue);
782 } 782 }
783 if (atomic_read(&rdev->irq.pflip[0])) 783 if (atomic_read(&rdev->irq.pflip[0]))
784 radeon_crtc_handle_flip(rdev, 0); 784 radeon_crtc_handle_vblank(rdev, 0);
785 } 785 }
786 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { 786 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
787 if (rdev->irq.crtc_vblank_int[1]) { 787 if (rdev->irq.crtc_vblank_int[1]) {
@@ -790,7 +790,7 @@ int rs600_irq_process(struct radeon_device *rdev)
790 wake_up(&rdev->irq.vblank_queue); 790 wake_up(&rdev->irq.vblank_queue);
791 } 791 }
792 if (atomic_read(&rdev->irq.pflip[1])) 792 if (atomic_read(&rdev->irq.pflip[1]))
793 radeon_crtc_handle_flip(rdev, 1); 793 radeon_crtc_handle_vblank(rdev, 1);
794 } 794 }
795 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { 795 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) {
796 queue_hotplug = true; 796 queue_hotplug = true;
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 9739d71cd0a2..5c1c0c795e98 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6150,7 +6150,7 @@ restart_ih:
6150 wake_up(&rdev->irq.vblank_queue); 6150 wake_up(&rdev->irq.vblank_queue);
6151 } 6151 }
6152 if (atomic_read(&rdev->irq.pflip[0])) 6152 if (atomic_read(&rdev->irq.pflip[0]))
6153 radeon_crtc_handle_flip(rdev, 0); 6153 radeon_crtc_handle_vblank(rdev, 0);
6154 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT; 6154 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
6155 DRM_DEBUG("IH: D1 vblank\n"); 6155 DRM_DEBUG("IH: D1 vblank\n");
6156 } 6156 }
@@ -6176,7 +6176,7 @@ restart_ih:
6176 wake_up(&rdev->irq.vblank_queue); 6176 wake_up(&rdev->irq.vblank_queue);
6177 } 6177 }
6178 if (atomic_read(&rdev->irq.pflip[1])) 6178 if (atomic_read(&rdev->irq.pflip[1]))
6179 radeon_crtc_handle_flip(rdev, 1); 6179 radeon_crtc_handle_vblank(rdev, 1);
6180 rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT; 6180 rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
6181 DRM_DEBUG("IH: D2 vblank\n"); 6181 DRM_DEBUG("IH: D2 vblank\n");
6182 } 6182 }
@@ -6202,7 +6202,7 @@ restart_ih:
6202 wake_up(&rdev->irq.vblank_queue); 6202 wake_up(&rdev->irq.vblank_queue);
6203 } 6203 }
6204 if (atomic_read(&rdev->irq.pflip[2])) 6204 if (atomic_read(&rdev->irq.pflip[2]))
6205 radeon_crtc_handle_flip(rdev, 2); 6205 radeon_crtc_handle_vblank(rdev, 2);
6206 rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT; 6206 rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
6207 DRM_DEBUG("IH: D3 vblank\n"); 6207 DRM_DEBUG("IH: D3 vblank\n");
6208 } 6208 }
@@ -6228,7 +6228,7 @@ restart_ih:
6228 wake_up(&rdev->irq.vblank_queue); 6228 wake_up(&rdev->irq.vblank_queue);
6229 } 6229 }
6230 if (atomic_read(&rdev->irq.pflip[3])) 6230 if (atomic_read(&rdev->irq.pflip[3]))
6231 radeon_crtc_handle_flip(rdev, 3); 6231 radeon_crtc_handle_vblank(rdev, 3);
6232 rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT; 6232 rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
6233 DRM_DEBUG("IH: D4 vblank\n"); 6233 DRM_DEBUG("IH: D4 vblank\n");
6234 } 6234 }
@@ -6254,7 +6254,7 @@ restart_ih:
6254 wake_up(&rdev->irq.vblank_queue); 6254 wake_up(&rdev->irq.vblank_queue);
6255 } 6255 }
6256 if (atomic_read(&rdev->irq.pflip[4])) 6256 if (atomic_read(&rdev->irq.pflip[4]))
6257 radeon_crtc_handle_flip(rdev, 4); 6257 radeon_crtc_handle_vblank(rdev, 4);
6258 rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT; 6258 rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
6259 DRM_DEBUG("IH: D5 vblank\n"); 6259 DRM_DEBUG("IH: D5 vblank\n");
6260 } 6260 }
@@ -6280,7 +6280,7 @@ restart_ih:
6280 wake_up(&rdev->irq.vblank_queue); 6280 wake_up(&rdev->irq.vblank_queue);
6281 } 6281 }
6282 if (atomic_read(&rdev->irq.pflip[5])) 6282 if (atomic_read(&rdev->irq.pflip[5]))
6283 radeon_crtc_handle_flip(rdev, 5); 6283 radeon_crtc_handle_vblank(rdev, 5);
6284 rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT; 6284 rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
6285 DRM_DEBUG("IH: D6 vblank\n"); 6285 DRM_DEBUG("IH: D6 vblank\n");
6286 } 6286 }
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 16:37:28 -0500