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authorMichel Dänzer <michel.daenzer@amd.com>2012-01-12 10:04:11 -0500
committerDave Airlie <airlied@redhat.com>2012-01-13 04:02:34 -0500
commit642ce5251b4fefdb8f2a55396707b8fa9f953e05 (patch)
tree1ea2fc1b2ac9c3a0fa3b5920b53f2eafdc415f63 /drivers/gpu/drm/radeon
parent9f821c675a389cf4aab7f1dc8ee0860fba4f3204 (diff)
radeon: Call pci_clear_master() instead of open-coding it.
Reported-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r--drivers/gpu/drm/radeon/r100.c4
-rw-r--r--drivers/gpu/drm/radeon/rs600.c13
2 files changed, 3 insertions, 14 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 3ec81c3d5108..bfd36ab643a6 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -2186,7 +2186,6 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
2186void r100_bm_disable(struct radeon_device *rdev) 2186void r100_bm_disable(struct radeon_device *rdev)
2187{ 2187{
2188 u32 tmp; 2188 u32 tmp;
2189 u16 tmp16;
2190 2189
2191 /* disable bus mastering */ 2190 /* disable bus mastering */
2192 tmp = RREG32(R_000030_BUS_CNTL); 2191 tmp = RREG32(R_000030_BUS_CNTL);
@@ -2197,8 +2196,7 @@ void r100_bm_disable(struct radeon_device *rdev)
2197 WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000040); 2196 WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000040);
2198 tmp = RREG32(RADEON_BUS_CNTL); 2197 tmp = RREG32(RADEON_BUS_CNTL);
2199 mdelay(1); 2198 mdelay(1);
2200 pci_read_config_word(rdev->pdev, 0x4, &tmp16); 2199 pci_clear_master(rdev->pdev);
2201 pci_write_config_word(rdev->pdev, 0x4, tmp16 & 0xFFFB);
2202 mdelay(1); 2200 mdelay(1);
2203} 2201}
2204 2202
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 803e0d3c1773..ec46eb45e34c 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -322,16 +322,6 @@ void rs600_hpd_fini(struct radeon_device *rdev)
322 } 322 }
323} 323}
324 324
325void rs600_bm_disable(struct radeon_device *rdev)
326{
327 u16 tmp;
328
329 /* disable bus mastering */
330 pci_read_config_word(rdev->pdev, 0x4, &tmp);
331 pci_write_config_word(rdev->pdev, 0x4, tmp & 0xFFFB);
332 mdelay(1);
333}
334
335int rs600_asic_reset(struct radeon_device *rdev) 325int rs600_asic_reset(struct radeon_device *rdev)
336{ 326{
337 struct rv515_mc_save save; 327 struct rv515_mc_save save;
@@ -355,7 +345,8 @@ int rs600_asic_reset(struct radeon_device *rdev)
355 WREG32(RADEON_CP_RB_CNTL, tmp); 345 WREG32(RADEON_CP_RB_CNTL, tmp);
356 pci_save_state(rdev->pdev); 346 pci_save_state(rdev->pdev);
357 /* disable bus mastering */ 347 /* disable bus mastering */
358 rs600_bm_disable(rdev); 348 pci_clear_master(rdev->pdev);
349 mdelay(1);
359 /* reset GA+VAP */ 350 /* reset GA+VAP */
360 WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_VAP(1) | 351 WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_VAP(1) |
361 S_0000F0_SOFT_RESET_GA(1)); 352 S_0000F0_SOFT_RESET_GA(1));