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authorAlex Deucher <alexander.deucher@amd.com>2013-07-27 17:50:26 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-07-29 18:14:42 -0400
commit63f22d0e98cf74adf4ecfb25099607239b00c751 (patch)
treede574ef5aec85f0097e2cd92544886d7d65ade47 /drivers/gpu/drm/radeon/si_dpm.c
parentd05f7e700a3a47eeb7dbe236d2680381f5b5edcb (diff)
drm/radeon/dpm: fix and enable reclocking on SI
The SMC interface changed compared to Cayman and previous asics. Set the enabled levels properly and enable reclocking by default when dpm is enabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/si_dpm.c')
-rw-r--r--drivers/gpu/drm/radeon/si_dpm.c14
1 files changed, 4 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index e8ee6858ce27..1604a87cf2fe 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -3238,10 +3238,10 @@ int si_dpm_force_performance_level(struct radeon_device *rdev,
3238{ 3238{
3239 struct radeon_ps *rps = rdev->pm.dpm.current_ps; 3239 struct radeon_ps *rps = rdev->pm.dpm.current_ps;
3240 struct ni_ps *ps = ni_get_ps(rps); 3240 struct ni_ps *ps = ni_get_ps(rps);
3241 u32 levels; 3241 u32 levels = ps->performance_level_count;
3242 3242
3243 if (level == RADEON_DPM_FORCED_LEVEL_HIGH) { 3243 if (level == RADEON_DPM_FORCED_LEVEL_HIGH) {
3244 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 0) != PPSMC_Result_OK) 3244 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK)
3245 return -EINVAL; 3245 return -EINVAL;
3246 3246
3247 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 1) != PPSMC_Result_OK) 3247 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 1) != PPSMC_Result_OK)
@@ -3250,14 +3250,13 @@ int si_dpm_force_performance_level(struct radeon_device *rdev,
3250 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) 3250 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK)
3251 return -EINVAL; 3251 return -EINVAL;
3252 3252
3253 levels = ps->performance_level_count - 1; 3253 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 1) != PPSMC_Result_OK)
3254 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK)
3255 return -EINVAL; 3254 return -EINVAL;
3256 } else if (level == RADEON_DPM_FORCED_LEVEL_AUTO) { 3255 } else if (level == RADEON_DPM_FORCED_LEVEL_AUTO) {
3257 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) 3256 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK)
3258 return -EINVAL; 3257 return -EINVAL;
3259 3258
3260 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 0) != PPSMC_Result_OK) 3259 if (si_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK)
3261 return -EINVAL; 3260 return -EINVAL;
3262 } 3261 }
3263 3262
@@ -6017,16 +6016,11 @@ int si_dpm_set_power_state(struct radeon_device *rdev)
6017 return ret; 6016 return ret;
6018 } 6017 }
6019 6018
6020#if 0
6021 /* XXX */
6022 ret = si_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO); 6019 ret = si_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
6023 if (ret) { 6020 if (ret) {
6024 DRM_ERROR("si_dpm_force_performance_level failed\n"); 6021 DRM_ERROR("si_dpm_force_performance_level failed\n");
6025 return ret; 6022 return ret;
6026 } 6023 }
6027#else
6028 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
6029#endif
6030 6024
6031 return 0; 6025 return 0;
6032} 6026}