aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/si.c
diff options
context:
space:
mode:
authorChristian König <christian.koenig@amd.com>2013-08-13 05:56:53 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-08-30 16:30:42 -0400
commite409b128625732926c112cc9b709fb7bb1aa387f (patch)
tree41a6cea66751573bf5a2e984942106860019f773 /drivers/gpu/drm/radeon/si.c
parent2e1e6dad6a6d437e4c40611fdcc4e6cd9e2f969e (diff)
drm/radeon: separate UVD code v3
Our different hardware blocks are actually completely separated, so it doesn't make much sense any more to structure the code by pure chipset generations. Start restructuring the code by separating our the UVD block. v2: updated commit message v3: rebased and restructurized start/stop functions for kv dpm. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
-rw-r--r--drivers/gpu/drm/radeon/si.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index ae232be62921..f3f79089405e 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6339,7 +6339,7 @@ static int si_startup(struct radeon_device *rdev)
6339 } 6339 }
6340 6340
6341 if (rdev->has_uvd) { 6341 if (rdev->has_uvd) {
6342 r = rv770_uvd_resume(rdev); 6342 r = uvd_v2_2_resume(rdev);
6343 if (!r) { 6343 if (!r) {
6344 r = radeon_fence_driver_start_ring(rdev, 6344 r = radeon_fence_driver_start_ring(rdev,
6345 R600_RING_TYPE_UVD_INDEX); 6345 R600_RING_TYPE_UVD_INDEX);
@@ -6420,7 +6420,7 @@ static int si_startup(struct radeon_device *rdev)
6420 UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR, 6420 UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR,
6421 RADEON_CP_PACKET2); 6421 RADEON_CP_PACKET2);
6422 if (!r) 6422 if (!r)
6423 r = r600_uvd_init(rdev, true); 6423 r = uvd_v1_0_init(rdev);
6424 if (r) 6424 if (r)
6425 DRM_ERROR("radeon: failed initializing UVD (%d).\n", r); 6425 DRM_ERROR("radeon: failed initializing UVD (%d).\n", r);
6426 } 6426 }
@@ -6473,7 +6473,7 @@ int si_suspend(struct radeon_device *rdev)
6473 si_cp_enable(rdev, false); 6473 si_cp_enable(rdev, false);
6474 cayman_dma_stop(rdev); 6474 cayman_dma_stop(rdev);
6475 if (rdev->has_uvd) { 6475 if (rdev->has_uvd) {
6476 r600_uvd_stop(rdev); 6476 uvd_v1_0_fini(rdev);
6477 radeon_uvd_suspend(rdev); 6477 radeon_uvd_suspend(rdev);
6478 } 6478 }
6479 si_irq_suspend(rdev); 6479 si_irq_suspend(rdev);
@@ -6616,7 +6616,7 @@ void si_fini(struct radeon_device *rdev)
6616 radeon_ib_pool_fini(rdev); 6616 radeon_ib_pool_fini(rdev);
6617 radeon_irq_kms_fini(rdev); 6617 radeon_irq_kms_fini(rdev);
6618 if (rdev->has_uvd) { 6618 if (rdev->has_uvd) {
6619 r600_uvd_stop(rdev); 6619 uvd_v1_0_fini(rdev);
6620 radeon_uvd_fini(rdev); 6620 radeon_uvd_fini(rdev);
6621 } 6621 }
6622 si_pcie_gart_fini(rdev); 6622 si_pcie_gart_fini(rdev);